diff options
Diffstat (limited to 'Source/DirectFB/gfxdrivers/nsc/include')
| -rwxr-xr-x | Source/DirectFB/gfxdrivers/nsc/include/Makefile.am | 5 | ||||
| -rwxr-xr-x | Source/DirectFB/gfxdrivers/nsc/include/Makefile.in | 403 | ||||
| -rwxr-xr-x | Source/DirectFB/gfxdrivers/nsc/include/gfx_regs.h | 1733 | ||||
| -rwxr-xr-x | Source/DirectFB/gfxdrivers/nsc/include/gfx_type.h | 426 | ||||
| -rwxr-xr-x | Source/DirectFB/gfxdrivers/nsc/include/nsc_galproto.h | 1987 | ||||
| -rwxr-xr-x | Source/DirectFB/gfxdrivers/nsc/include/pnl_defs.h | 201 |
6 files changed, 4755 insertions, 0 deletions
diff --git a/Source/DirectFB/gfxdrivers/nsc/include/Makefile.am b/Source/DirectFB/gfxdrivers/nsc/include/Makefile.am new file mode 100755 index 0000000..dac0046 --- /dev/null +++ b/Source/DirectFB/gfxdrivers/nsc/include/Makefile.am @@ -0,0 +1,5 @@ +EXTRA_DIST = \ + gfx_regs.h \ + gfx_type.h \ + nsc_galproto.h \ + pnl_defs.h diff --git a/Source/DirectFB/gfxdrivers/nsc/include/Makefile.in b/Source/DirectFB/gfxdrivers/nsc/include/Makefile.in new file mode 100755 index 0000000..b91603a --- /dev/null +++ b/Source/DirectFB/gfxdrivers/nsc/include/Makefile.in @@ -0,0 +1,403 @@ +# Makefile.in generated by automake 1.10.1 from Makefile.am. +# @configure_input@ + +# Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, +# 2003, 2004, 2005, 2006, 2007, 2008 Free Software Foundation, Inc. +# This Makefile.in is free software; the Free Software Foundation +# gives unlimited permission to copy and/or distribute it, +# with or without modifications, as long as this notice is preserved. + +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY, to the extent permitted by law; without +# even the implied warranty of MERCHANTABILITY or FITNESS FOR A +# PARTICULAR PURPOSE. + +@SET_MAKE@ +VPATH = @srcdir@ +pkgdatadir = $(datadir)/@PACKAGE@ +pkglibdir = $(libdir)/@PACKAGE@ +pkgincludedir = $(includedir)/@PACKAGE@ +am__cd = CDPATH="$${ZSH_VERSION+.}$(PATH_SEPARATOR)" && cd +install_sh_DATA = $(install_sh) -c -m 644 +install_sh_PROGRAM = $(install_sh) -c +install_sh_SCRIPT = $(install_sh) -c +INSTALL_HEADER = $(INSTALL_DATA) +transform = $(program_transform_name) +NORMAL_INSTALL = : +PRE_INSTALL = : +POST_INSTALL = : +NORMAL_UNINSTALL = : +PRE_UNINSTALL = : +POST_UNINSTALL = : +build_triplet = @build@ +host_triplet = @host@ +target_triplet = @target@ +subdir = gfxdrivers/nsc/include +DIST_COMMON = $(srcdir)/Makefile.am $(srcdir)/Makefile.in +ACLOCAL_M4 = $(top_srcdir)/aclocal.m4 +am__aclocal_m4_deps = $(top_srcdir)/m4/as-ac-expand.m4 \ + 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INSTALL_PROGRAM="$(INSTALL_STRIP_PROGRAM)" \ + install_sh_PROGRAM="$(INSTALL_STRIP_PROGRAM)" INSTALL_STRIP_FLAG=-s \ + `test -z '$(STRIP)' || \ + echo "INSTALL_PROGRAM_ENV=STRIPPROG='$(STRIP)'"` install +mostlyclean-generic: + +clean-generic: + +distclean-generic: + -test -z "$(CONFIG_CLEAN_FILES)" || rm -f $(CONFIG_CLEAN_FILES) + +maintainer-clean-generic: + @echo "This command is intended for maintainers to use" + @echo "it deletes files that may require special tools to rebuild." +clean: clean-am + +clean-am: clean-generic clean-libtool mostlyclean-am + +distclean: distclean-am + -rm -f Makefile +distclean-am: clean-am distclean-generic + +dvi: dvi-am + +dvi-am: + +html: html-am + +info: info-am + +info-am: + +install-data-am: + +install-dvi: install-dvi-am + +install-exec-am: + +install-html: install-html-am + +install-info: install-info-am + +install-man: + +install-pdf: install-pdf-am + +install-ps: install-ps-am + +installcheck-am: + +maintainer-clean: maintainer-clean-am + -rm -f Makefile +maintainer-clean-am: distclean-am maintainer-clean-generic + +mostlyclean: mostlyclean-am + +mostlyclean-am: mostlyclean-generic mostlyclean-libtool + +pdf: pdf-am + +pdf-am: + +ps: ps-am + +ps-am: + +uninstall-am: + +.MAKE: install-am install-strip + +.PHONY: all all-am check check-am clean clean-generic clean-libtool \ + distclean distclean-generic distclean-libtool distdir dvi \ + dvi-am html html-am info info-am install install-am \ + install-data install-data-am install-dvi install-dvi-am \ + install-exec install-exec-am install-html install-html-am \ + install-info install-info-am install-man install-pdf \ + install-pdf-am install-ps install-ps-am install-strip \ + installcheck installcheck-am installdirs maintainer-clean \ + maintainer-clean-generic mostlyclean mostlyclean-generic \ + mostlyclean-libtool pdf pdf-am ps ps-am uninstall uninstall-am + +# Tell versions [3.59,3.63) of GNU make to not export all variables. +# Otherwise a system limit (for SysV at least) may be exceeded. +.NOEXPORT: diff --git a/Source/DirectFB/gfxdrivers/nsc/include/gfx_regs.h b/Source/DirectFB/gfxdrivers/nsc/include/gfx_regs.h new file mode 100755 index 0000000..059ce47 --- /dev/null +++ b/Source/DirectFB/gfxdrivers/nsc/include/gfx_regs.h @@ -0,0 +1,1733 @@ +/* + * $Workfile: gfx_regs.h $ + * + * This header file contains the graphics register definitions. + */ + +/* NSC_LIC_ALTERNATIVE_PREAMBLE + * + * Revision 1.0 + * + * National Semiconductor Alternative GPL-BSD License + * + * National Semiconductor Corporation licenses this software + * ("Software"): + * + * National Xfree frame buffer driver + * + * under one of the two following licenses, depending on how the + * Software is received by the Licensee. + * + * If this Software is received as part of the Linux Framebuffer or + * other GPL licensed software, then the GPL license designated + * NSC_LIC_GPL applies to this Software; in all other circumstances + * then the BSD-style license designated NSC_LIC_BSD shall apply. + * + * END_NSC_LIC_ALTERNATIVE_PREAMBLE */ + +/* NSC_LIC_BSD + * + * National Semiconductor Corporation Open Source License for + * + * National Xfree frame buffer driver + * + * (BSD License with Export Notice) + * + * Copyright (c) 1999-2001 + * National Semiconductor Corporation. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * * Redistributions in binary form must reproduce the above + * copyright notice, this list of conditions and the following + * disclaimer in the documentation and/or other materials provided + * with the distribution. + * + * * Neither the name of the National Semiconductor Corporation nor + * the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior + * written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER + * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE, + * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF + * YOUR JURISDICTION. It is licensee's responsibility to comply with + * any export regulations applicable in licensee's jurisdiction. Under + * CURRENT (2001) U.S. export regulations this software + * is eligible for export from the U.S. and can be downloaded by or + * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed + * destinations which include Cuba, Iraq, Libya, North Korea, Iran, + * Syria, Sudan, Afghanistan and any other country to which the U.S. + * has embargoed goods and services. + * + * END_NSC_LIC_BSD */ + +/* NSC_LIC_GPL + * + * National Semiconductor Corporation Gnu General Public License for + * + * National Xfree frame buffer driver + * + * (GPL License with Export Notice) + * + * Copyright (c) 1999-2001 + * National Semiconductor Corporation. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted under the terms of the GNU General + * Public License as published by the Free Software Foundation; either + * version 2 of the License, or (at your option) any later version + * + * In addition to the terms of the GNU General Public License, neither + * the name of the National Semiconductor Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER + * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE, + * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. See the GNU General Public License for more details. + * + * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF + * YOUR JURISDICTION. It is licensee's responsibility to comply with + * any export regulations applicable in licensee's jurisdiction. Under + * CURRENT (2001) U.S. export regulations this software + * is eligible for export from the U.S. and can be downloaded by or + * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed + * destinations which include Cuba, Iraq, Libya, North Korea, Iran, + * Syria, Sudan, Afghanistan and any other country to which the U.S. + * has embargoed goods and services. + * + * You should have received a copy of the GNU General Public License + * along with this file; if not, write to the Free Software Foundation, + * Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + * END_NSC_LIC_GPL */ + + +/*----------------------------------*/ +/* FIRST GENERATION GRAPHICS UNIT */ +/*----------------------------------*/ + +#define GP_DST_XCOOR 0x8100 /* x destination origin */ +#define GP_DST_YCOOR 0x8102 /* y destination origin */ +#define GP_WIDTH 0x8104 /* pixel width */ +#define GP_HEIGHT 0x8106 /* pixel height */ +#define GP_SRC_XCOOR 0x8108 /* x source origin */ +#define GP_SRC_YCOOR 0x810A /* y source origin */ + +#define GP_VECTOR_LENGTH 0x8104 /* vector length */ +#define GP_INIT_ERROR 0x8106 /* vector initial error */ +#define GP_AXIAL_ERROR 0x8108 /* axial error increment */ +#define GP_DIAG_ERROR 0x810A /* diagonal error increment */ + +#define GP_SRC_COLOR_0 0x810C /* source color 0 */ +#define GP_SRC_COLOR_1 0x810E /* source color 1 */ +#define GP_PAT_COLOR_0 0x8110 /* pattern color 0 */ +#define GP_PAT_COLOR_1 0x8112 /* pattern color 1 */ +#define GP_PAT_COLOR_2 0x8114 /* pattern color 2 */ +#define GP_PAT_COLOR_3 0x8116 /* pattern color 3 */ +#define GP_PAT_DATA_0 0x8120 /* bits 31:0 of pattern */ +#define GP_PAT_DATA_1 0x8124 /* bits 63:32 of pattern */ +#define GP_PAT_DATA_2 0x8128 /* bits 95:64 of pattern */ +#define GP_PAT_DATA_3 0x812C /* bits 127:96 of pattern */ + +#define GP_VGA_WRITE 0x8140 /* VGA write path control */ +#define GP_VGA_READ 0x8144 /* VGA read path control */ + +#define GP_RASTER_MODE 0x8200 /* raster operation */ +#define GP_VECTOR_MODE 0x8204 /* vector mode register */ +#define GP_BLIT_MODE 0x8208 /* blit mode register */ +#define GP_BLIT_STATUS 0x820C /* blit status register */ + +#define GP_VGA_BASE 0x8210 /* VGA memory offset (x64K) */ +#define GP_VGA_LATCH 0x8214 /* VGA display latch */ + +/* "GP_VECTOR_MODE" BIT DEFINITIONS */ + +#define VM_X_MAJOR 0x0000 /* X major vector */ +#define VM_Y_MAJOR 0x0001 /* Y major vector */ +#define VM_MAJOR_INC 0x0002 /* positive major axis step */ +#define VM_MINOR_INC 0x0004 /* positive minor axis step */ +#define VM_READ_DST_FB 0x0008 /* read destination data */ + +/* "GP_RASTER_MODE" BIT DEFINITIONS */ + +#define RM_PAT_DISABLE 0x0000 /* pattern is disabled */ +#define RM_PAT_MONO 0x0100 /* 1BPP pattern expansion */ +#define RM_PAT_DITHER 0x0200 /* 2BPP pattern expansion */ +#define RM_PAT_COLOR 0x0300 /* 8BPP or 16BPP pattern */ +#define RM_PAT_MASK 0x0300 /* mask for pattern mode */ +#define RM_PAT_TRANSPARENT 0x0400 /* transparent 1BPP pattern */ +#define RM_SRC_TRANSPARENT 0x0800 /* transparent 1BPP source */ + +/* "GP_BLIT_STATUS" BIT DEFINITIONS */ + +#define BS_BLIT_BUSY 0x0001 /* blit engine is busy */ +#define BS_PIPELINE_BUSY 0x0002 /* graphics pipeline is busy*/ +#define BS_BLIT_PENDING 0x0004 /* blit pending */ +#define BC_FLUSH 0x0080 /* flush pipeline requests */ +#define BC_8BPP 0x0000 /* 8BPP mode */ +#define BC_16BPP 0x0100 /* 16BPP mode */ +#define BC_FB_WIDTH_1024 0x0000 /* framebuffer width = 1024 */ +#define BC_FB_WIDTH_2048 0x0200 /* framebuffer width = 2048 */ +#define BC_FB_WIDTH_4096 0x0400 /* framebuffer width = 4096 */ + +/* "GP_BLIT_MODE" BIT DEFINITIONS */ + +#define BM_READ_SRC_NONE 0x0000 /* source foreground color */ +#define BM_READ_SRC_FB 0x0001 /* read source from FB */ +#define BM_READ_SRC_BB0 0x0002 /* read source from BB0 */ +#define BM_READ_SRC_BB1 0x0003 /* read source from BB1 */ +#define BM_READ_SRC_MASK 0x0003 /* read source mask */ + +#define BM_READ_DST_NONE 0x0000 /* no destination data */ +#define BM_READ_DST_BB0 0x0008 /* destination from BB0 */ +#define BM_READ_DST_BB1 0x000C /* destination from BB1 */ +#define BM_READ_DST_FB0 0x0010 /* dest from FB (store BB0) */ +#define BM_READ_DST_FB1 0x0014 /* dest from FB (store BB1) */ +#define BM_READ_DST_MASK 0x001C /* read destination mask */ + +#define BM_WRITE_FB 0x0000 /* write to framebuffer */ +#define BM_WRITE_MEM 0x0020 /* write to memory */ +#define BM_WRITE_MASK 0x0020 /* write mask */ + +#define BM_SOURCE_COLOR 0x0000 /* source is 8BPP or 16BPP */ +#define BM_SOURCE_EXPAND 0x0040 /* source is 1BPP */ +#define BM_SOURCE_TEXT 0x00C0 /* source is 1BPP text */ +#define BM_SOURCE_MASK 0x00C0 /* source mask */ + +#define BM_REVERSE_Y 0x0100 /* reverse Y direction */ + +/*---------------------------------------*/ +/* FIRST GENERATION DISPLAY CONTROLLER */ +/*---------------------------------------*/ + +#define DC_UNLOCK 0x8300 /* lock register */ +#define DC_GENERAL_CFG 0x8304 /* config registers... */ +#define DC_TIMING_CFG 0x8308 +#define DC_OUTPUT_CFG 0x830C + +#define DC_FB_ST_OFFSET 0x8310 /* framebuffer start offset */ +#define DC_CB_ST_OFFSET 0x8314 /* compression start offset */ +#define DC_CURS_ST_OFFSET 0x8318 /* cursor start offset */ +#define DC_ICON_ST_OFFSET 0x831C /* icon start offset */ +#define DC_VID_ST_OFFSET 0x8320 /* video start offset */ +#define DC_LINE_DELTA 0x8324 /* fb and cb skip counts */ +#define DC_BUF_SIZE 0x8328 /* fb and cb line size */ + +#define DC_H_TIMING_1 0x8330 /* horizontal timing... */ +#define DC_H_TIMING_2 0x8334 +#define DC_H_TIMING_3 0x8338 +#define DC_FP_H_TIMING 0x833C + +#define DC_V_TIMING_1 0x8340 /* vertical timing... */ +#define DC_V_TIMING_2 0x8344 +#define DC_V_TIMING_3 0x8348 +#define DC_FP_V_TIMING 0x834C + +#define DC_CURSOR_X 0x8350 /* cursor x position */ +#define DC_ICON_X 0x8354 /* HACK - 1.3 definition */ +#define DC_V_LINE_CNT 0x8354 /* vertical line counter */ +#define DC_CURSOR_Y 0x8358 /* cursor y position */ +#define DC_ICON_Y 0x835C /* HACK - 1.3 definition */ +#define DC_SS_LINE_CMP 0x835C /* line compare value */ +#define DC_CURSOR_COLOR 0x8360 /* cursor colors */ +#define DC_ICON_COLOR 0x8364 /* icon colors */ +#define DC_BORDER_COLOR 0x8368 /* border color */ +#define DC_PAL_ADDRESS 0x8370 /* palette address */ +#define DC_PAL_DATA 0x8374 /* palette data */ +#define DC_DFIFO_DIAG 0x8378 /* display FIFO diagnostic */ +#define DC_CFIFO_DIAG 0x837C /* compression FIF0 diagnostic */ + +/* PALETTE LOCATIONS */ + +#define PAL_CURSOR_COLOR_0 0x100 +#define PAL_CURSOR_COLOR_1 0x101 +#define PAL_ICON_COLOR_0 0x102 +#define PAL_ICON_COLOR_1 0x103 +#define PAL_OVERSCAN_COLOR 0x104 + +/* UNLOCK VALUE */ + +#define DC_UNLOCK_VALUE 0x00004758 /* used to unlock DC regs */ + +/* "DC_GENERAL_CFG" BIT DEFINITIONS */ + +#define DC_GCFG_DFLE 0x00000001 /* display FIFO load enable */ +#define DC_GCFG_CURE 0x00000002 /* cursor enable */ +#define DC_GCFG_VCLK_DIV 0x00000004 /* vid clock divisor */ +#define DC_GCFG_PLNO 0x00000004 /* planar offset LSB */ +#define DC_GCFG_PPC 0x00000008 /* pixel pan compatibility */ +#define DC_GCFG_CMPE 0x00000010 /* compression enable */ +#define DC_GCFG_DECE 0x00000020 /* decompression enable */ +#define DC_GCFG_DCLK_MASK 0x000000C0 /* dotclock multiplier */ +#define DC_GCFG_DCLK_POS 6 /* dotclock multiplier */ +#define DC_GCFG_DFHPSL_MASK 0x00000F00 /* FIFO high-priority start */ +#define DC_GCFG_DFHPSL_POS 8 /* FIFO high-priority start */ +#define DC_GCFG_DFHPEL_MASK 0x0000F000 /* FIFO high-priority end */ +#define DC_GCFG_DFHPEL_POS 12 /* FIFO high-priority end */ +#define DC_GCFG_CIM_MASK 0x00030000 /* compressor insert mode */ +#define DC_GCFG_CIM_POS 16 /* compressor insert mode */ +#define DC_GCFG_FDTY 0x00040000 /* frame dirty mode */ +#define DC_GCFG_RTPM 0x00080000 /* real-time perf. monitor */ +#define DC_GCFG_DAC_RS_MASK 0x00700000 /* DAC register selects */ +#define DC_GCFG_DAC_RS_POS 20 /* DAC register selects */ +#define DC_GCFG_CKWR 0x00800000 /* clock write */ +#define DC_GCFG_LDBL 0x01000000 /* line double */ +#define DC_GCFG_DIAG 0x02000000 /* FIFO diagnostic mode */ +#define DC_GCFG_CH4S 0x04000000 /* sparse refresh mode */ +#define DC_GCFG_SSLC 0x08000000 /* enable line compare */ +#define DC_GCFG_VIDE 0x10000000 /* video enable */ +#define DC_GCFG_DFCK 0x20000000 /* divide flat-panel clock - rev 2.3 down */ +#define DC_GCFG_VRDY 0x20000000 /* video port speed - rev 2.4 up */ +#define DC_GCFG_DPCK 0x40000000 /* divide pixel clock */ +#define DC_GCFG_DDCK 0x80000000 /* divide dot clock */ + +/* "DC_TIMING_CFG" BIT DEFINITIONS */ + +#define DC_TCFG_FPPE 0x00000001 /* flat-panel power enable */ +#define DC_TCFG_HSYE 0x00000002 /* horizontal sync enable */ +#define DC_TCFG_VSYE 0x00000004 /* vertical sync enable */ +#define DC_TCFG_BLKE 0x00000008 /* blank enable */ +#define DC_TCFG_DDCK 0x00000010 /* DDC clock */ +#define DC_TCFG_TGEN 0x00000020 /* timing generator enable */ +#define DC_TCFG_VIEN 0x00000040 /* vertical interrupt enable*/ +#define DC_TCFG_BLNK 0x00000080 /* blink enable */ +#define DC_TCFG_CHSP 0x00000100 /* horizontal sync polarity */ +#define DC_TCFG_CVSP 0x00000200 /* vertical sync polarity */ +#define DC_TCFG_FHSP 0x00000400 /* panel horz sync polarity */ +#define DC_TCFG_FVSP 0x00000800 /* panel vert sync polarity */ +#define DC_TCFG_FCEN 0x00001000 /* flat-panel centering */ +#define DC_TCFG_CDCE 0x00002000 /* HACK - 1.3 definition */ +#define DC_TCFG_PLNR 0x00002000 /* planar mode enable */ +#define DC_TCFG_INTL 0x00004000 /* interlace scan */ +#define DC_TCFG_PXDB 0x00008000 /* pixel double */ +#define DC_TCFG_BKRT 0x00010000 /* blink rate */ +#define DC_TCFG_PSD_MASK 0x000E0000 /* power sequence delay */ +#define DC_TCFG_PSD_POS 17 /* power sequence delay */ +#define DC_TCFG_DDCI 0x08000000 /* DDC input (RO) */ +#define DC_TCFG_SENS 0x10000000 /* monitor sense (RO) */ +#define DC_TCFG_DNA 0x20000000 /* display not active (RO) */ +#define DC_TCFG_VNA 0x40000000 /* vertical not active (RO) */ +#define DC_TCFG_VINT 0x80000000 /* vertical interrupt (RO) */ + +/* "DC_OUTPUT_CFG" BIT DEFINITIONS */ + +#define DC_OCFG_8BPP 0x00000001 /* 8/16 bpp select */ +#define DC_OCFG_555 0x00000002 /* 16 bpp format */ +#define DC_OCFG_PCKE 0x00000004 /* PCLK enable */ +#define DC_OCFG_FRME 0x00000008 /* frame rate mod enable */ +#define DC_OCFG_DITE 0x00000010 /* dither enable */ +#define DC_OCFG_2PXE 0x00000020 /* 2 pixel enable */ +#define DC_OCFG_2XCK 0x00000040 /* 2 x pixel clock */ +#define DC_OCFG_2IND 0x00000080 /* 2 index enable */ +#define DC_OCFG_34ADD 0x00000100 /* 3- or 4-bit add */ +#define DC_OCFG_FRMS 0x00000200 /* frame rate mod select */ +#define DC_OCFG_CKSL 0x00000400 /* clock select */ +#define DC_OCFG_PRMP 0x00000800 /* palette re-map */ +#define DC_OCFG_PDEL 0x00001000 /* panel data enable low */ +#define DC_OCFG_PDEH 0x00002000 /* panel data enable high */ +#define DC_OCFG_CFRW 0x00004000 /* comp line buffer r/w sel */ +#define DC_OCFG_DIAG 0x00008000 /* comp line buffer diag */ + +#define MC_MEM_CNTRL1 0x00008400 +#define MC_DR_ADD 0x00008418 +#define MC_DR_ACC 0x0000841C + +/* MC_MEM_CNTRL1 BIT DEFINITIONS */ + +#define MC_XBUSARB 0x00000008 /* 0 = GP priority < CPU priority */ + /* 1 = GP priority = CPU priority */ + /* GXm databook V2.0 is wrong ! */ +/*----------*/ +/* CS5530 */ +/*----------*/ + +/* CS5530 REGISTER DEFINITIONS */ + +#define CS5530_VIDEO_CONFIG 0x0000 +#define CS5530_DISPLAY_CONFIG 0x0004 +#define CS5530_VIDEO_X_POS 0x0008 +#define CS5530_VIDEO_Y_POS 0x000C +#define CS5530_VIDEO_SCALE 0x0010 +#define CS5530_VIDEO_COLOR_KEY 0x0014 +#define CS5530_VIDEO_COLOR_MASK 0x0018 +#define CS5530_PALETTE_ADDRESS 0x001C +#define CS5530_PALETTE_DATA 0x0020 +#define CS5530_DOT_CLK_CONFIG 0x0024 +#define CS5530_CRCSIG_TFT_TV 0x0028 + +/* "CS5530_VIDEO_CONFIG" BIT DEFINITIONS */ + +#define CS5530_VCFG_VID_EN 0x00000001 +#define CS5530_VCFG_VID_REG_UPDATE 0x00000002 +#define CS5530_VCFG_VID_INP_FORMAT 0x0000000C +#define CS5530_VCFG_8_BIT_4_2_0 0x00000004 +#define CS5530_VCFG_16_BIT_4_2_0 0x00000008 +#define CS5530_VCFG_GV_SEL 0x00000010 +#define CS5530_VCFG_CSC_BYPASS 0x00000020 +#define CS5530_VCFG_X_FILTER_EN 0x00000040 +#define CS5530_VCFG_Y_FILTER_EN 0x00000080 +#define CS5530_VCFG_LINE_SIZE_LOWER_MASK 0x0000FF00 +#define CS5530_VCFG_INIT_READ_MASK 0x01FF0000 +#define CS5530_VCFG_EARLY_VID_RDY 0x02000000 +#define CS5530_VCFG_LINE_SIZE_UPPER 0x08000000 +#define CS5530_VCFG_4_2_0_MODE 0x10000000 +#define CS5530_VCFG_16_BIT_EN 0x20000000 +#define CS5530_VCFG_HIGH_SPD_INT 0x40000000 + +/* "CS5530_DISPLAY_CONFIG" BIT DEFINITIONS */ + +#define CS5530_DCFG_DIS_EN 0x00000001 +#define CS5530_DCFG_HSYNC_EN 0x00000002 +#define CS5530_DCFG_VSYNC_EN 0x00000004 +#define CS5530_DCFG_DAC_BL_EN 0x00000008 +#define CS5530_DCFG_DAC_PWDNX 0x00000020 +#define CS5530_DCFG_FP_PWR_EN 0x00000040 +#define CS5530_DCFG_FP_DATA_EN 0x00000080 +#define CS5530_DCFG_CRT_HSYNC_POL 0x00000100 +#define CS5530_DCFG_CRT_VSYNC_POL 0x00000200 +#define CS5530_DCFG_FP_HSYNC_POL 0x00000400 +#define CS5530_DCFG_FP_VSYNC_POL 0x00000800 +#define CS5530_DCFG_XGA_FP 0x00001000 +#define CS5530_DCFG_FP_DITH_EN 0x00002000 +#define CS5530_DCFG_CRT_SYNC_SKW_MASK 0x0001C000 +#define CS5530_DCFG_CRT_SYNC_SKW_INIT 0x00010000 +#define CS5530_DCFG_PWR_SEQ_DLY_MASK 0x000E0000 +#define CS5530_DCFG_PWR_SEQ_DLY_INIT 0x00080000 +#define CS5530_DCFG_VG_CK 0x00100000 +#define CS5530_DCFG_GV_PAL_BYP 0x00200000 +#define CS5530_DCFG_DDC_SCL 0x00400000 +#define CS5530_DCFG_DDC_SDA 0x00800000 +#define CS5530_DCFG_DDC_OE 0x01000000 +#define CS5530_DCFG_16_BIT_EN 0x02000000 + + +/*----------*/ +/* SC1200 */ +/*----------*/ + +/* SC1200 VIDEO REGISTER DEFINITIONS */ + +#define SC1200_VIDEO_CONFIG 0x000 +#define SC1200_DISPLAY_CONFIG 0x004 +#define SC1200_VIDEO_X_POS 0x008 +#define SC1200_VIDEO_Y_POS 0x00C +#define SC1200_VIDEO_UPSCALE 0x010 +#define SC1200_VIDEO_COLOR_KEY 0x014 +#define SC1200_VIDEO_COLOR_MASK 0x018 +#define SC1200_PALETTE_ADDRESS 0x01C +#define SC1200_PALETTE_DATA 0x020 +#define SC1200_VID_MISC 0x028 +#define SC1200_VID_CLOCK_SELECT 0x02C +#define SC1200_VIDEO_DOWNSCALER_CONTROL 0x03C +#define SC1200_VIDEO_DOWNSCALER_COEFFICIENTS 0x40 +#define SC1200_VID_CRC 0x044 +#define SC1200_DEVICE_ID 0x048 +#define SC1200_VID_ALPHA_CONTROL 0x04C +#define SC1200_CURSOR_COLOR_KEY 0x050 +#define SC1200_CURSOR_COLOR_MASK 0x054 +#define SC1200_CURSOR_COLOR_1 0x058 +#define SC1200_CURSOR_COLOR_2 0x05C +#define SC1200_ALPHA_XPOS_1 0x060 +#define SC1200_ALPHA_YPOS_1 0x064 +#define SC1200_ALPHA_COLOR_1 0x068 +#define SC1200_ALPHA_CONTROL_1 0x06C +#define SC1200_ALPHA_XPOS_2 0x070 +#define SC1200_ALPHA_YPOS_2 0x074 +#define SC1200_ALPHA_COLOR_2 0x078 +#define SC1200_ALPHA_CONTROL_2 0x07C +#define SC1200_ALPHA_XPOS_3 0x080 +#define SC1200_ALPHA_YPOS_3 0x084 +#define SC1200_ALPHA_COLOR_3 0x088 +#define SC1200_ALPHA_CONTROL_3 0x08C +#define SC1200_VIDEO_REQUEST 0x090 +#define SC1200_ALPHA_WATCH 0x094 +#define SC1200_VIDEO_DISPLAY_MODE 0x400 +#define SC1200_VIDEO_ODD_VBI_LINE_ENABLE 0x40C +#define SC1200_VIDEO_EVEN_VBI_LINE_ENABLE 0x410 +#define SC1200_VIDEO_VBI_HORIZ_CONTROL 0x414 +#define SC1200_VIDEO_ODD_VBI_TOTAL_COUNT 0x418 +#define SC1200_VIDEO_EVEN_VBI_TOTAL_COUNT 0x41C +#define SC1200_GENLOCK 0x420 +#define SC1200_GENLOCK_DELAY 0x424 +#define SC1200_TVOUT_HORZ_TIM 0x800 +#define SC1200_TVOUT_HORZ_SYNC 0x804 +#define SC1200_TVOUT_VERT_SYNC 0x808 +#define SC1200_TVOUT_LINE_END 0x80C +#define SC1200_TVOUT_VERT_DOWNSCALE 0x810 /* REV. A & B */ +#define SC1200_TVOUT_HORZ_PRE_ENCODER_SCALE 0x810 /* REV. C */ +#define SC1200_TVOUT_HORZ_SCALING 0x814 +#define SC1200_TVOUT_DEBUG 0x818 +#define SC1200_TVENC_TIM_CTRL_1 0xC00 +#define SC1200_TVENC_TIM_CTRL_2 0xC04 +#define SC1200_TVENC_TIM_CTRL_3 0xC08 +#define SC1200_TVENC_SUB_FREQ 0xC0C +#define SC1200_TVENC_DISP_POS 0xC10 +#define SC1200_TVENC_DISP_SIZE 0xC14 +#define SC1200_TVENC_CC_DATA 0xC18 +#define SC1200_TVENC_EDS_DATA 0xC1C +#define SC1200_TVENC_CGMS_DATA 0xC20 +#define SC1200_TVENC_WSS_DATA 0xC24 +#define SC1200_TVENC_CC_CONTROL 0xC28 +#define SC1200_TVENC_DAC_CONTROL 0xC2C +#define SC1200_TVENC_MV_CONTROL 0xC30 + +/* "SC1200_VIDEO_CONFIG" BIT DEFINITIONS */ + +#define SC1200_VCFG_VID_EN 0x00000001 +#define SC1200_VCFG_VID_INP_FORMAT 0x0000000C +#define SC1200_VCFG_UYVY_FORMAT 0x00000000 +#define SC1200_VCFG_Y2YU_FORMAT 0x00000004 +#define SC1200_VCFG_YUYV_FORMAT 0x00000008 +#define SC1200_VCFG_YVYU_FORMAT 0x0000000C +#define SC1200_VCFG_X_FILTER_EN 0x00000040 +#define SC1200_VCFG_Y_FILTER_EN 0x00000080 +#define SC1200_VCFG_LINE_SIZE_LOWER_MASK 0x0000FF00 +#define SC1200_VCFG_INIT_READ_MASK 0x01FF0000 +#define SC1200_VCFG_LINE_SIZE_UPPER 0x08000000 +#define SC1200_VCFG_4_2_0_MODE 0x10000000 + +/* "SC1200_DISPLAY_CONFIG" BIT DEFINITIONS */ + +#define SC1200_DCFG_DIS_EN 0x00000001 +#define SC1200_DCFG_HSYNC_EN 0x00000002 +#define SC1200_DCFG_VSYNC_EN 0x00000004 +#define SC1200_DCFG_DAC_BL_EN 0x00000008 +#define SC1200_DCFG_FP_PWR_EN 0x00000040 +#define SC1200_DCFG_FP_DATA_EN 0x00000080 +#define SC1200_DCFG_CRT_HSYNC_POL 0x00000100 +#define SC1200_DCFG_CRT_VSYNC_POL 0x00000200 +#define SC1200_DCFG_CRT_SYNC_SKW_MASK 0x0001C000 +#define SC1200_DCFG_CRT_SYNC_SKW_INIT 0x00010000 +#define SC1200_DCFG_PWR_SEQ_DLY_MASK 0x000E0000 +#define SC1200_DCFG_PWR_SEQ_DLY_INIT 0x00080000 +#define SC1200_DCFG_VG_CK 0x00100000 +#define SC1200_DCFG_GV_PAL_BYP 0x00200000 +#define SC1200_DCFG_DDC_SCL 0x00400000 +#define SC1200_DCFG_DDC_SDA 0x00800000 +#define SC1200_DCFG_DDC_OE 0x01000000 + +/* "SC1200_VID_MISC" BIT DEFINITIONS */ + +#define SC1200_GAMMA_BYPASS_BOTH 0x00000001 +#define SC1200_DAC_POWER_DOWN 0x00000400 +#define SC1200_ANALOG_POWER_DOWN 0x00000800 +#define SC1200_PLL_POWER_NORMAL 0x00001000 + +/* "SC1200_VIDEO_DOWNSCALER_CONTROL" BIT DEFINITIONS */ + +#define SC1200_VIDEO_DOWNSCALE_ENABLE 0x00000001 +#define SC1200_VIDEO_DOWNSCALE_FACTOR_POS 1 +#define SC1200_VIDEO_DOWNSCALE_FACTOR_MASK 0x0000001E +#define SC1200_VIDEO_DOWNSCALE_TYPE_A 0x00000000 +#define SC1200_VIDEO_DOWNSCALE_TYPE_B 0x00000040 +#define SC1200_VIDEO_DOWNSCALE_TYPE_MASK 0x00000040 + +/* "SC1200_VIDEO_DOWNSCALER_COEFFICIENTS" BIT DEFINITIONS */ + +#define SC1200_VIDEO_DOWNSCALER_COEF1_POS 0 +#define SC1200_VIDEO_DOWNSCALER_COEF2_POS 8 +#define SC1200_VIDEO_DOWNSCALER_COEF3_POS 16 +#define SC1200_VIDEO_DOWNSCALER_COEF4_POS 24 +#define SC1200_VIDEO_DOWNSCALER_COEF_MASK 0xF + +/* VIDEO DE-INTERLACING AND ALPHA CONTROL (REGISTER 0x4C) */ + +#define SC1200_VERTICAL_SCALER_SHIFT_MASK 0x00000007 +#define SC1200_VERTICAL_SCALER_SHIFT_INIT 0x00000004 +#define SC1200_VERTICAL_SCALER_SHIFT_EN 0x00000010 +#define SC1200_TOP_LINE_IN_ODD 0x00000040 +#define SC1200_NO_CK_OUTSIDE_ALPHA 0x00000100 +#define SC1200_VIDEO_IS_INTERLACED 0x00000200 +#define SC1200_CSC_VIDEO_YUV_TO_RGB 0x00000400 +#define SC1200_CSC_GFX_RGB_TO_YUV 0x00000800 +#define SC1200_VIDEO_INPUT_IS_RGB 0x00002000 +#define SC1200_VIDEO_LINE_OFFSET_ODD 0x00001000 +#define SC1200_ALPHA1_PRIORITY_POS 16 +#define SC1200_ALPHA1_PRIORITY_MASK 0x00030000 +#define SC1200_ALPHA2_PRIORITY_POS 18 +#define SC1200_ALPHA2_PRIORITY_MASK 0x000C0000 +#define SC1200_ALPHA3_PRIORITY_POS 20 +#define SC1200_ALPHA3_PRIORITY_MASK 0x00300000 + +/* VIDEO CURSOR COLOR KEY DEFINITIONS (REGISTER 0x50) */ + +#define SC1200_CURSOR_COLOR_KEY_OFFSET_POS 24 +#define SC1200_CURSOR_COLOR_BITS 23 +#define SC1200_COLOR_MASK 0x00FFFFFF /* 24 significant bits */ + +/* ALPHA COLOR BIT DEFINITION (REGISTERS 0x68, 0x78, AND 0x88) */ + +#define SC1200_ALPHA_COLOR_ENABLE 0x01000000 + +/* ALPHA CONTROL BIT DEFINITIONS (REGISTERS 0x6C, 0x7C, AND 0x8C) */ + +#define SC1200_ACTRL_WIN_ENABLE 0x00010000 +#define SC1200_ACTRL_LOAD_ALPHA 0x00020000 + +/* VIDEO REQUEST DEFINITIONS (REGISTER 0x90) */ + +#define SC1200_VIDEO_Y_REQUEST_POS 0 +#define SC1200_VIDEO_X_REQUEST_POS 16 +#define SC1200_VIDEO_REQUEST_MASK 0x00000FFF + +/* VIDEO DISPLAY MODE (REGISTER 0x400) */ + +#define SC1200_VIDEO_SOURCE_MASK 0x00000003 +#define SC1200_VIDEO_SOURCE_GX1 0x00000000 +#define SC1200_VIDEO_SOURCE_DVIP 0x00000002 +#define SC1200_VBI_SOURCE_MASK 0x00000004 +#define SC1200_VBI_SOURCE_DVIP 0x00000000 +#define SC1200_VBI_SOURCE_GX1 0x00000004 + +/* ODD/EVEN VBI LINE ENABLE (REGISTERS 0x40C, 0x410) */ + +#define SC1200_VIDEO_VBI_LINE_ENABLE_MASK 0x00FFFFFC +#define SC1200_VIDEO_ALL_ACTIVE_IS_VBI 0x01000000 +#define SC1200_VIDEO_VBI_LINE_OFFSET_POS 25 +#define SC1200_VIDEO_VBI_LINE_OFFSET_MASK 0x3E000000 + +/* ODD/EVEN VBI TOTAL COUNT (REGISTERS 0x418, 0x41C) */ + +#define SC1200_VIDEO_VBI_TOTAL_COUNT_MASK 0x000FFFFF + +/* GENLOCK BIT DEFINITIONS */ + +#define SC1200_GENLOCK_SINGLE_ENABLE 0x00000001 +#define SC1200_GENLOCK_FIELD_SYNC_ENABLE 0x00000001 +#define SC1200_GENLOCK_CONTINUOUS_ENABLE 0x00000002 +#define SC1200_GENLOCK_GX_VSYNC_FALLING_EDGE 0x00000004 +#define SC1200_GENLOCK_VIP_VSYNC_FALLING_EDGE 0x00000008 +#define SC1200_GENLOCK_TIMEOUT_ENABLE 0x00000010 +#define SC1200_GENLOCK_TVENC_RESET_EVEN_FIELD 0x00000020 +#define SC1200_GENLOCK_TVENC_RESET_BEFORE_DELAY 0x00000040 +#define SC1200_GENLOCK_TVENC_RESET_ENABLE 0x00000080 +#define SC1200_GENLOCK_SYNC_TO_TVENC 0x00000100 +#define SC1200_GENLOCK_DELAY_MASK 0x001FFFFF + +/* TVOUT HORIZONTAL PRE ENCODER SCALE BIT DEFINITIONS */ + +#define SC1200_TVOUT_YC_DELAY_MASK 0x00C00000 +#define SC1200_TVOUT_YC_DELAY_NONE 0x00000000 +#define SC1200_TVOUT_Y_DELAY_ONE_PIXEL 0x00400000 +#define SC1200_TVOUT_C_DELAY_ONE_PIXEL 0x00800000 +#define SC1200_TVOUT_C_DELAY_TWO_PIXELS 0x00C00000 + +/* TVOUT HORIZONTAL SCALING/CONTROL BIT DEFINITIONS */ + +#define SC1200_TVOUT_FLICKER_FILTER_MASK 0x60000000 +#define SC1200_TVOUT_FLICKER_FILTER_FOURTH_HALF_FOURTH 0x00000000 +#define SC1200_TVOUT_FLICKER_FILTER_HALF_ONE_HALF 0x20000000 +#define SC1200_TVOUT_FLICKER_FILTER_DISABLED 0x40000000 +#define SC1200_TVENC_EXTERNAL_RESET_INTERVAL_MASK 0x0F000000 +#define SC1200_TVENC_EXTERNAL_RESET_EVERY_ODD_FIELD 0x00000000 +#define SC1200_TVENC_EXTERNAL_RESET_EVERY_EVEN_FIELD 0x02000000 +#define SC1200_TVENC_EXTERNAL_RESET_NEXT_ODD_FIELD 0x05000000 +#define SC1200_TVENC_EXTERNAL_RESET_NEXT_EVEN_FIELD 0x07000000 +#define SC1200_TVENC_EXTERNAL_RESET_EVERY_FIELD 0x0E000000 +#define SC1200_TVENC_EXTERNAL_RESET_EVERY_X_ODD_FIELDS 0x08000000 +#define SC1200_TVENC_EXTERNAL_RESET_EVERY_X_EVEN_FIELDS 0x0A000000 + +/* TVOUT DEBUG BIT DEFINITIONS */ + +#define SC1200_TVOUT_FIELD_STATUS_EVEN 0x00000040 +#define SC1200_TVOUT_FIELD_STATUS_TV 0x00000080 +#define SC1200_TVOUT_CRT_VSYNC_STATUS_TRAILING 0x00000100 +#define SC1200_TVOUT_FIELD_STATUS_INVERT 0x00000200 +#define SC1200_TVOUT_CONVERTER_INTERPOLATION 0x00000400 + +/* TVENC TIMING/CONTROL 1 BIT DEFINITIONS (REGISTER 0xC00) */ + +#define SC1200_TVENC_VPHASE_MASK 0x001FF800 +#define SC1200_TVENC_VPHASE_POS 11 +#define SC1200_TVENC_SUB_CARRIER_RESET_MASK 0x30000000 +#define SC1200_TVENC_SUB_CARRIER_RESET_NEVER 0x00000000 +#define SC1200_TVENC_SUB_CARRIER_RESET_EVERY_TWO_LINES 0x10000000 +#define SC1200_TVENC_SUB_CARRIER_RESET_EVERY_TWO_FRAMES 0x20000000 +#define SC1200_TVENC_SUB_CARRIER_RESET_EVERY_FOUR_FRAMES 0x30000000 +#define SC1200_TVENC_VIDEO_TIMING_ENABLE 0x80000000 + +/* TVENC TIMING/CONTROL 2 BIT DEFINITIONS (REGISTER 0xC04) */ + +#define SC1200_TVENC_OUTPUT_YCBCR 0x40000000 +#define SC1200_TVENC_CFS_MASK 0x00030000 +#define SC1200_TVENC_CFS_BYPASS 0x00000000 +#define SC1200_TVENC_CFS_CVBS 0x00020000 +#define SC1200_TVENC_CFS_SVIDEO 0x00030000 + +/* TVENC TIMING/CONTROL 3 BIT DEFINITIONS (REGISTER 0xC08) */ + +#define SC1200_TVENC_CS 0x00000001 +#define SC1200_TVENC_SYNCMODE_MASK 0x00000006 +#define SC1200_TVENC_SYNC_ON_GREEN 0x00000002 +#define SC1200_TVENC_SYNC_ON_CVBS 0x00000004 +#define SC1200_TVENC_CM 0x00000008 + +/* TVENC DAC CONTROL BIT DEFINITIONS (REGISTER 0xC2C) */ +#define SC1200_TVENC_TRIM_MASK 0x00000007 +#define SC1200_TVENC_POWER_DOWN 0x00000020 + +/* TVENC MV CONTROL BIT DEFINITIONS (REGISTER 0xC30) */ +#define SC1200_TVENC_MV_ENABLE 0xBE + +/* SC1200 VIP REGISTER DEFINITIONS */ + +#define SC1200_VIP_CONFIG 0x00000000 +#define SC1200_VIP_CONTROL 0x00000004 +#define SC1200_VIP_STATUS 0x00000008 +#define SC1200_VIP_CURRENT_LINE 0x00000010 +#define SC1200_VIP_LINE_TARGET 0x00000014 +#define SC1200_ODD_DIRECT_VBI_LINE_ENABLE 0x00000018 +#define SC1200_EVEN_DIRECT_VBI_LINE_ENABLE 0x0000001C +#define SC1200_VIP_ODD_BASE 0x00000020 +#define SC1200_VIP_EVEN_BASE 0x00000024 +#define SC1200_VIP_PITCH 0x00000028 +#define SC1200_VBI_ODD_BASE 0x00000040 +#define SC1200_VBI_EVEN_BASE 0x00000044 +#define SC1200_VBI_PITCH 0x00000048 + +/* "SC1200_VIP_CONFIG" BIT DEFINITIONS */ + +#define SC1200_VIP_MODE_MASK 0x00000003 +#define SC1200_VIP_MODE_C 0x00000002 +#define SC1200_VBI_ANCILLARY_TO_MEMORY 0x000C0000 +#define SC1200_VBI_TASK_A_TO_MEMORY 0x00140000 +#define SC1200_VBI_TASK_B_TO_MEMORY 0x00240000 +#define SC1200_VIP_BUS_REQUEST_THRESHOLD 0x00400000 + +/* "SC1200_VIP_CONTROL" BIT DEFINITIONS */ + +#define SC1200_CAPTURE_RUN_MODE_MASK 0x00000003 +#define SC1200_CAPTURE_RUN_MODE_STOP_LINE 0x00000000 +#define SC1200_CAPTURE_RUN_MODE_STOP_FIELD 0x00000001 +#define SC1200_CAPTURE_RUN_MODE_START 0x00000003 +#define SC1200_VIP_DATA_CAPTURE_EN 0x00000100 +#define SC1200_VIP_VBI_CAPTURE_EN 0x00000200 +#define SC1200_VIP_VBI_FIELD_INTERRUPT_EN 0x00010000 + +/* "SC1200_VIP_STATUS" BIT DEFINITIONS */ + +#define SC1200_VIP_CURRENT_FIELD_ODD 0x01000000 +#define SC1200_VIP_BASE_NOT_UPDATED 0x00200000 +#define SC1200_VIP_FIFO_OVERFLOW 0x00100000 +#define SC1200_VIP_CLEAR_LINE_INT 0x00020000 +#define SC1200_VIP_CLEAR_FIELD_INT 0x00010000 +#define SC1200_VBI_DATA_CAPTURE_ACTIVE 0x00000200 +#define SC1200_VIDEO_DATA_CAPTURE_ACTIVE 0x00000100 + +/* "SC1200_VIP_CURRENT_LINE" BIT DEFINITIONS */ + +#define SC1200_VIP_CURRENT_LINE_MASK 0x000003FF + +/* "SC1200_VIP_LINE_TARGET" BIT DEFINITIONS */ + +#define SC1200_VIP_LAST_LINE_MASK 0x03FF0000 + +/* "SC1200_VIP_PITCH" BIT DEFINITION */ + +#define SC1200_VIP_PITCH_MASK 0x0000FFFC + +/* "SC1200_VBI_PITCH" BIT DEFINITION */ + +#define SC1200_VBI_PITCH_MASK 0x0000FFFC + +/* SC1200 DIRECT VBI LINE ENABLE BIT DEFINITION */ + +#define SC1200_DIRECT_VBI_LINE_ENABLE_MASK 0x00FFFFFF + +/* SC1200 CONFIGURATION BLOCK */ + +#define SC1200_CB_BASE_ADDR 0x9000 +#define SC1200_CB_WDTO 0x0000 +#define SC1200_CB_WDCNFG 0x0002 +#define SC1200_CB_WDSTS 0x0004 +#define SC1200_CB_TMVALUE 0x0008 +#define SC1200_CB_TMCNFG 0x000D +#define SC1200_CB_PMR 0x0030 +#define SC1200_CB_MCR 0x0034 +#define SC1200_CB_INTSEL 0x0038 +#define SC1200_CB_PID 0x003C +#define SC1200_CB_REV 0x003D + +/* SC1200 HIGH RESOLUTION TIMER CONFIGURATION REGISTER BITS */ + +#define SC1200_TMCLKSEL_27MHZ 0x2 + +/*---------------------------------*/ +/* PHILIPS SAA7114 VIDEO DECODER */ +/*---------------------------------*/ + +#define SAA7114_CHIPADDR 0x42 + +/* VIDEO DECODER REGISTER DEFINITIONS */ + +#define SAA7114_ANALOG_INPUT_CTRL1 0x02 +#define SAA7114_LUMINANCE_CONTROL 0x09 +#define SAA7114_BRIGHTNESS 0x0A +#define SAA7114_CONTRAST 0x0B +#define SAA7114_SATURATION 0x0C +#define SAA7114_HUE 0x0D +#define SAA7114_STATUS 0x1F +#define SAA7114_IPORT_CONTROL 0x86 + +/* TASK A REGISTER DEFINITIONS */ + +#define SAA7114_TASK_A_HORZ_OUTPUT_LO 0x9C +#define SAA7114_TASK_A_HORZ_OUTPUT_HI 0x9D +#define SAA7114_TASK_A_HSCALE_LUMA_LO 0xA8 +#define SAA7114_TASK_A_HSCALE_LUMA_HI 0xA9 +#define SAA7114_TASK_A_HSCALE_CHROMA_LO 0xAC +#define SAA7114_TASK_A_HSCALE_CHROMA_HI 0xAD + +/* TASK B REGISTER DEFINITIONS */ + +#define SAA7114_HORZ_OFFSET_LO 0xC4 +#define SAA7114_HORZ_OFFSET_HI 0xC5 +#define SAA7114_HORZ_INPUT_LO 0xC6 +#define SAA7114_HORZ_INPUT_HI 0xC7 +#define SAA7114_VERT_OFFSET_LO 0xC8 +#define SAA7114_VERT_OFFSET_HI 0xC9 +#define SAA7114_VERT_INPUT_LO 0xCA +#define SAA7114_VERT_INPUT_HI 0xCB +#define SAA7114_HORZ_OUTPUT_LO 0xCC +#define SAA7114_HORZ_OUTPUT_HI 0xCD +#define SAA7114_VERT_OUTPUT_LO 0xCE +#define SAA7114_VERT_OUTPUT_HI 0xCF +#define SAA7114_HORZ_PRESCALER 0xD0 +#define SAA7114_HORZ_ACL 0xD1 +#define SAA7114_HORZ_FIR_PREFILTER 0xD2 +#define SAA7114_FILTER_CONTRAST 0xD5 +#define SAA7114_FILTER_SATURATION 0xD6 +#define SAA7114_HSCALE_LUMA_LO 0xD8 +#define SAA7114_HSCALE_LUMA_HI 0xD9 +#define SAA7114_HSCALE_CHROMA_LO 0xDC +#define SAA7114_HSCALE_CHROMA_HI 0xDD +#define SAA7114_VSCALE_LUMA_LO 0xE0 +#define SAA7114_VSCALE_LUMA_HI 0xE1 +#define SAA7114_VSCALE_CHROMA_LO 0xE2 +#define SAA7114_VSCALE_CHROMA_HI 0xE3 +#define SAA7114_VSCALE_CONTROL 0xE4 +#define SAA7114_VSCALE_CHROMA_OFFS0 0xE8 +#define SAA7114_VSCALE_CHROMA_OFFS1 0xE9 +#define SAA7114_VSCALE_CHROMA_OFFS2 0xEA +#define SAA7114_VSCALE_CHROMA_OFFS3 0xEB +#define SAA7114_VSCALE_LUMINA_OFFS0 0xEC +#define SAA7114_VSCALE_LUMINA_OFFS1 0xED +#define SAA7114_VSCALE_LUMINA_OFFS2 0xEE +#define SAA7114_VSCALE_LUMINA_OFFS3 0xEF + + +/* Still need to determine PHO value (common phase offset) */ +#define SAA7114_VSCALE_PHO 0x00 + + +/*----------------------------------------------*/ +/* SECOND GENERATION GRAPHICS UNIT (REDCLOUD) */ +/*----------------------------------------------*/ + +#define MGP_DST_OFFSET 0x0000 /* dst address */ +#define MGP_SRC_OFFSET 0x0004 /* src address */ +#define MGP_VEC_ERR 0x0004 /* vector diag/axial errors */ +#define MGP_STRIDE 0x0008 /* src and dst strides */ +#define MGP_WID_HEIGHT 0x000C /* width and height of BLT */ +#define MGP_VEC_LEN 0x000C /* vector length/init error */ +#define MGP_SRC_COLOR_FG 0x0010 /* src mono data fgcolor */ +#define MGP_SRC_COLOR_BG 0x0014 /* src mono data bkcolor */ +#define MGP_PAT_COLOR_0 0x0018 /* pattern color 0 */ +#define MGP_PAT_COLOR_1 0x001C /* pattern color 1 */ +#define MGP_PAT_COLOR_2 0x0020 /* pattern color 2 */ +#define MGP_PAT_COLOR_3 0x0024 /* pattern color 3 */ +#define MGP_PAT_COLOR_4 0x0028 /* pattern color 4 */ +#define MGP_PAT_COLOR_5 0x002C /* pattern color 5 */ +#define MGP_PAT_DATA_0 0x0030 /* pattern data 0 */ +#define MGP_PAT_DATA_1 0x0034 /* pattern data 1 */ +#define MGP_RASTER_MODE 0x0038 /* raster operation */ +#define MGP_VECTOR_MODE 0x003C /* render vector */ +#define MGP_BLT_MODE 0x0040 /* render BLT */ +#define MGP_BLT_STATUS 0x0044 /* BLT status register */ +#define MGP_RESET 0x0044 /* reset register (write) */ +#define MGP_HST_SOURCE 0x0048 /* host src data (bitmap) */ +#define MGP_BASE_OFFSET 0x004C /* base render offset */ + +/* MGP_RASTER_MODE DEFINITIONS */ + +#define MGP_RM_BPPFMT_332 0x00000000 /* 8 BPP, 3:3:2 */ +#define MGP_RM_BPPFMT_4444 0x40000000 /* 16 BPP, 4:4:4:4 */ +#define MGP_RM_BPPFMT_1555 0x50000000 /* 16 BPP, 1:5:5:5 */ +#define MGP_RM_BPPFMT_565 0x60000000 /* 16 BPP, 5:6:5 */ +#define MGP_RM_BPPFMT_8888 0x80000000 /* 32 BPP, 8:8:8:8 */ +#define MGP_RM_ALPHA_EN_MASK 0x00C00000 /* Alpha enable */ +#define MGP_RM_ALPHA_TO_RGB 0x00400000 /* Alpha applies to RGB */ +#define MGP_RM_ALPHA_TO_ALPHA 0x00800000 /* Alpha applies to alpha */ +#define MGP_RM_ALPHA_OP_MASK 0x00300000 /* Alpha operation */ +#define MGP_RM_ALPHA_TIMES_A 0x00000000 /* Alpha * A */ +#define MGP_RM_BETA_TIMES_B 0x00100000 /* (1-alpha) * B */ +#define MGP_RM_A_PLUS_BETA_B 0x00200000 /* A + (1-alpha) * B */ +#define MGP_RM_ALPHA_A_PLUS_BETA_B 0x00300000 /* alpha * A + (1 - alpha)B */ +#define MGP_RM_ALPHA_SELECT 0x000E0000 /* Alpha Select */ +#define MGP_RM_SELECT_ALPHA_A 0x00000000 /* Alpha from channel A */ +#define MGP_RM_SELECT_ALPHA_B 0x00020000 /* Alpha from channel B */ +#define MGP_RM_SELECT_ALPHA_R 0x00040000 /* Registered alpha */ +#define MGP_RM_SELECT_ALPHA_1 0x00060000 /* Constant 1 */ +#define MGP_RM_SELECT_ALPHA_CHAN_A 0x00080000 /* RGB Values from A */ +#define MGP_RM_SELECT_ALPHA_CHAN_B 0x000A0000 /* RGB Values from B */ +#define MGP_RM_DEST_FROM_CHAN_A 0x00010000 /* Alpha channel select */ +#define MGP_RM_PAT_FLAGS 0x00000700 /* pattern related bits */ +#define MGP_RM_PAT_MONO 0x00000100 /* monochrome pattern */ +#define MGP_RM_PAT_COLOR 0x00000200 /* color pattern */ +#define MGP_RM_PAT_TRANS 0x00000400 /* pattern transparency */ +#define MGP_RM_SRC_TRANS 0x00000800 /* source transparency */ + +/* MGP_VECTOR_MODE DEFINITIONS */ + +#define MGP_VM_DST_REQ 0x00000008 /* dst data required */ +#define MGP_VM_THROTTLE 0x00000010 /* sync to VBLANK */ + +/* MGP_BLT_MODE DEFINITIONS */ + +#define MGP_BM_SRC_FB 0x00000001 /* src = frame buffer */ +#define MGP_BM_SRC_HOST 0x00000002 /* src = host register */ +#define MGP_BM_DST_REQ 0x00000004 /* dst data required */ +#define MGP_BM_SRC_MONO 0x00000040 /* monochrome source data */ +#define MGP_BM_SRC_BP_MONO 0x00000080 /* Byte-packed monochrome */ +#define MGP_BM_NEG_YDIR 0x00000100 /* negative Y direction */ +#define MGP_BM_NEG_XDIR 0x00000200 /* negative X direction */ +#define MGP_BM_THROTTLE 0x00000400 /* sync to VBLANK */ + +/* MGP_BLT_STATUS DEFINITIONS */ + +#define MGP_BS_BLT_BUSY 0x00000001 /* GP is not idle */ +#define MGP_BS_BLT_PENDING 0x00000004 /* second BLT is pending */ +#define MGP_BS_HALF_EMPTY 0x00000008 /* src FIFO half empty */ + +/* ALPHA BLENDING MODES */ + +#define ALPHA_MODE_BLEND 0x00000000 + +/*---------------------------------------------------*/ +/* SECOND GENERATION DISPLAY CONTROLLER (REDCLOUD) */ +/*---------------------------------------------------*/ + +#define MDC_UNLOCK 0x00000000 /* Unlock register */ +#define MDC_GENERAL_CFG 0x00000004 /* Config registers */ +#define MDC_DISPLAY_CFG 0x00000008 +#define MDC_GFX_SCL 0x0000000C /* Graphics scaling */ + +#define MDC_FB_ST_OFFSET 0x00000010 /* Frame buffer start offset */ +#define MDC_CB_ST_OFFSET 0x00000014 /* Compression start offset */ +#define MDC_CURS_ST_OFFSET 0x00000018 /* Cursor buffer start offset */ +#define MDC_ICON_ST_OFFSET 0x0000001C /* Icon buffer start offset */ +#define MDC_VID_Y_ST_OFFSET 0x00000020 /* Video Y Buffer start offset */ +#define MDC_VID_U_ST_OFFSET 0x00000024 /* Video U Buffer start offset */ +#define MDC_VID_V_ST_OFFSET 0x00000028 /* Video V Buffer start offset */ +#define MDC_LINE_SIZE 0x00000030 /* Video, CB, and FB line sizes */ +#define MDC_GFX_PITCH 0x00000034 /* FB and DB skip counts */ +#define MDC_VID_YUV_PITCH 0x00000038 /* Y, U and V buffer skip counts */ + +#define MDC_H_ACTIVE_TIMING 0x00000040 /* Horizontal timings */ +#define MDC_H_BLANK_TIMING 0x00000044 +#define MDC_H_SYNC_TIMING 0x00000048 +#define MDC_V_ACTIVE_TIMING 0x00000050 /* Vertical Timings */ +#define MDC_V_BLANK_TIMING 0x00000054 +#define MDC_V_SYNC_TIMING 0x00000058 + +#define MDC_CURSOR_X 0x00000060 /* Cursor X position */ +#define MDC_CURSOR_Y 0x00000064 /* Cursor Y Position */ +#define MDC_ICON_X 0x00000068 /* Icon X Position */ +#define MDC_LINE_CNT_STATUS 0x0000006C /* Icon Y Position */ + +#define MDC_PAL_ADDRESS 0x00000070 /* Palette Address */ +#define MDC_PAL_DATA 0x00000074 /* Palette Data */ +#define MDC_DFIFO_DIAG 0x00000078 /* Display FIFO diagnostic */ +#define MDC_CFIFO_DIAG 0x0000007C /* Compression FIFO diagnostic */ + +#define MDC_VID_DS_DELTA 0x00000080 /* Vertical Downscaling fraction */ + +#define MDC_PHY_MEM_OFFSET 0x00000084 /* VG Base Address Register */ +#define MDC_DV_CTL 0x00000088 /* Dirty-Valid Control Register */ +#define MDC_DV_ACC 0x0000008C /* Dirty-Valid RAM Access */ + +/* UNLOCK VALUE */ + +#define MDC_UNLOCK_VALUE 0x00004758 /* used to unlock DC regs */ + +/* VG MBUS DEVICE SMI MSR FIELDS */ + +#define MDC_VG_BL_MASK 0x00000001 +#define MDC_MISC_MASK 0x00000002 +#define MDC_ISR0_MASK 0x00000004 +#define MDC_VGA_BL_MASK 0x00000008 +#define MDC_CRTCIO_MSK 0x00000010 +#define MDC_VG_BLANK_SMI 0x00000001 +#define MDC_MISC_SMI 0x00000002 +#define MDC_ISR0_SMI 0x00000004 +#define MDC_VGA_BLANK_SMI 0x00000008 +#define MDC_CRTCIO_SMI 0x00000010 + +/* MDC_GENERAL_CFG BIT FIELDS */ + +#define MDC_GCFG_DBUG 0x80000000 +#define MDC_GCFG_DBSL 0x40000000 +#define MDC_GCFG_CFRW 0x20000000 +#define MDC_GCFG_DIAG 0x10000000 +#define MDC_GCFG_GXRFS4 0x08000000 +#define MDC_GCFG_SGFR 0x04000000 +#define MDC_GCFG_SGRE 0x02000000 +#define MDC_GCFG_SIGE 0x01000000 +#define MDC_GCFG_YUVM 0x00100000 +#define MDC_GCFG_VDSE 0x00080000 +#define MDC_GCFG_VGAFT 0x00040000 +#define MDC_GCFG_FDTY 0x00020000 +#define MDC_GCFG_STFM 0x00010000 +#define MDC_GCFG_DFHPEL_MASK 0x0000F000 +#define MDC_GCFG_DFHPSL_MASK 0x00000F00 +#define MDC_GCFG_VGAE 0x00000080 +#define MDC_GCFG_DECE 0x00000040 +#define MDC_GCFG_CMPE 0x00000020 +#define MDC_GCFG_VIDE 0x00000008 +#define MDC_GCFG_ICNE 0x00000004 +#define MDC_GCFG_CURE 0x00000002 +#define MDC_GCFG_DFLE 0x00000001 + +/* MDC_DISPLAY_CFG BIT FIELDS */ + +#define MDC_DCFG_A20M 0x80000000 +#define MDC_DCFG_A18M 0x40000000 +#define MDC_DCFG_VISL 0x08000000 +#define MDC_DCFG_FRLK 0x04000000 +#define MDC_DCFG_PALB 0x02000000 +#define MDC_DCFG_PIX_PAN_MASK 0x00F00000 +#define MDC_DCFG_DCEN 0x00080000 +#define MDC_DCFG_16BPP_MODE_MASK 0x00000C00 +#define MDC_DCFG_16BPP 0x00000000 +#define MDC_DCFG_15BPP 0x00000400 +#define MDC_DCFG_12BPP 0x00000800 +#define MDC_DCFG_DISP_MODE_MASK 0x00000300 +#define MDC_DCFG_DISP_MODE_8BPP 0x00000000 +#define MDC_DCFG_DISP_MODE_16BPP 0x00000100 +#define MDC_DCFG_DISP_MODE_24BPP 0x00000200 +#define MDC_DCFG_SCLE 0x00000080 +#define MDC_DCFG_TRUP 0x00000040 +#define MDC_DCFG_VIEN 0x00000020 +#define MDC_DCFG_VDEN 0x00000010 +#define MDC_DCFG_GDEN 0x00000008 +#define MDC_DCFG_VCKE 0x00000004 +#define MDC_DCFG_PCKE 0x00000002 +#define MDC_DCFG_TGEN 0x00000001 + +/* MDC_LINE_CNT BIT FIELDS */ + +#define MDC_LNCNT_DNA 0x80000000 +#define MDC_LNCNT_VNA 0x40000000 +#define MDC_LNCNT_VSA 0x20000000 +#define MDC_LNCNT_VINT 0x10000000 +#define MDC_LNCNT_FLIP 0x08000000 +#define MDC_LNCNT_V_LINE_CNT 0x07FF0000 +#define MDC_LNCNT_VFLIP 0x00008000 +#define MDC_LNCNT_SIGC 0x00004000 +#define MDC_LNCNT_SS_LINE_CMP 0x000007FF + +/* MDC_FB_ST_OFFSET BIT FIELDS */ + +#define MDC_FB_ST_OFFSET_MASK 0x0FFFFFFF + +/* MDC_CB_ST_OFFSET BIT FIELDS */ + +#define MDC_CB_ST_OFFSET_MASK 0x0FFFFFFF + +/* MDC_CURS_ST_OFFSET BIT FIELDS */ + +#define MDC_CURS_ST_OFFSET_MASK 0x0FFFFFFF + +/* MDC_ICON_ST_OFFSET BIT FIELDS */ + +#define MDC_ICON_ST_OFFSET_MASK 0x0FFFFFFF + +/* MDC_VID_Y_ST_OFFSET BIT FIELDS */ + +#define MDC_VID_Y_ST_OFFSET_MASK 0x0FFFFFFF + +/* MDC_VID_U_ST_OFFSET BIT FIELDS */ + +#define MDC_VID_U_ST_OFFSET_MASK 0x0FFFFFFF + +/* MDC_VID_V_ST_OFFSET BIT FIELDS */ + +#define MDC_VID_V_ST_OFFSET_MASK 0x0FFFFFFF + +/* MDC_LINE_SIZE BIT FIELDS */ + +#define MDC_LINE_SIZE_VLS_MASK 0xFF000000 +#define MDC_LINE_SIZE_CBLS_MASK 0x007F0000 +#define MDC_LINE_SIZE_FBLS_MASK 0x000007FF + +/* MDC_GFX_PITCH BIT FIELDS */ + +#define MDC_GFX_PITCH_CBP_MASK 0xFFFF0000 +#define MDC_GFX_PITCH_FBP_MASK 0x0000FFFF + +/* MDC_VID_YUV_PITCH BIT FIELDS */ + +#define MDC_YUV_PITCH_UVP_MASK 0xFFFF0000 +#define MDC_YUV_PITCH_YBP_MASK 0x0000FFFF + +/* MDC_H_ACTIVE_TIMING BIT FIELDS */ + +#define MDC_HAT_HT_MASK 0x0FF80000 +#define MDC_HAT_HA_MASK 0x00000FF8 + +/* MDC_H_BLANK_TIMING BIT FIELDS */ + +#define MDC_HBT_HBE_MASK 0x0FF80000 +#define MDC_HBT_HBS_MASK 0x00000FF8 + +/* MDC_H_SYNC_TIMING BIT FIELDS */ + +#define MDC_HST_HSE_MASK 0x0FF80000 +#define MDC_HST_HSS_MASK 0x00000FF8 + +/* MDC_V_ACTIVE_TIMING BIT FIELDS */ + +#define MDC_VAT_VT_MASK 0x07FF0000 +#define MDC_VAT_VA_MASK 0x000007FF + +/* MDC_V_BLANK_TIMING BIT FIELDS */ + +#define MDC_VBT_VBE_MASK 0x07FF0000 +#define MDC_VBT_VBS_MASK 0x000007FF + +/* MDC_V_SYNC_TIMING BIT FIELDS */ + +#define MDC_VST_VSE_MASK 0x07FF0000 +#define MDC_VST_VSS_MASK 0x000007FF + +/* MDC_DV_CTL BIT DEFINITIONS */ + +#define MDC_DV_LINE_SIZE_MASK 0x00000C00 +#define MDC_DV_LINE_SIZE_1024 0x00000000 +#define MDC_DV_LINE_SIZE_2048 0x00000400 +#define MDC_DV_LINE_SIZE_4096 0x00000800 +#define MDC_DV_LINE_SIZE_8192 0x00000C00 + +/* VGA DEFINITIONS */ + +#define MDC_SEQUENCER_INDEX 0x03C4 +#define MDC_SEQUENCER_DATA 0x03C5 +#define MDC_SEQUENCER_RESET 0x00 +#define MDC_SEQUENCER_CLK_MODE 0x01 + +#define MDC_RESET_VGA_DISP_ENABLE 0x03 +#define MDC_CLK_MODE_SCREEN_OFF 0x20 + + +/*---------------------------------------------------*/ +/* REDCLOUD DISPLAY FILTER */ +/*---------------------------------------------------*/ + +/* RCDF VIDEO REGISTER DEFINITIONS */ + +#define RCDF_VIDEO_CONFIG 0x000 +#define RCDF_DISPLAY_CONFIG 0x008 +#define RCDF_VIDEO_X_POS 0x010 +#define RCDF_VIDEO_Y_POS 0x018 +#define RCDF_VIDEO_SCALE 0x020 +#define RCDF_VIDEO_COLOR_KEY 0x028 +#define RCDF_VIDEO_COLOR_MASK 0x030 +#define RCDF_PALETTE_ADDRESS 0x038 +#define RCDF_PALETTE_DATA 0x040 +#define RCDF_VID_MISC 0x050 +#define RCDF_VID_CLOCK_SELECT 0x058 +#define RCDF_VIDEO_DOWNSCALER_CONTROL 0x078 +#define RCDF_VIDEO_DOWNSCALER_COEFFICIENTS 0x080 +#define RCDF_VID_CRC 0x088 +#define RCDF_VID_CRC32 0x090 +#define RCDF_VID_ALPHA_CONTROL 0x098 +#define RCDF_CURSOR_COLOR_KEY 0x0A0 +#define RCDF_CURSOR_COLOR_MASK 0x0A8 +#define RCDF_CURSOR_COLOR_1 0x0B0 +#define RCDF_CURSOR_COLOR_2 0x0B8 +#define RCDF_ALPHA_XPOS_1 0x0C0 +#define RCDF_ALPHA_YPOS_1 0x0C8 +#define RCDF_ALPHA_COLOR_1 0x0D0 +#define RCDF_ALPHA_CONTROL_1 0x0D8 +#define RCDF_ALPHA_XPOS_2 0x0E0 +#define RCDF_ALPHA_YPOS_2 0x0E8 +#define RCDF_ALPHA_COLOR_2 0x0F0 +#define RCDF_ALPHA_CONTROL_2 0x0F8 +#define RCDF_ALPHA_XPOS_3 0x100 +#define RCDF_ALPHA_YPOS_3 0x108 +#define RCDF_ALPHA_COLOR_3 0x110 +#define RCDF_ALPHA_CONTROL_3 0x118 +#define RCDF_VIDEO_REQUEST 0x120 +#define RCDF_ALPHA_WATCH 0x128 +#define RCDF_VIDEO_TEST_MODE 0x210 +#define RCDF_POWER_MANAGEMENT 0x410 + +/* DISPLAY FILTER POWER MANAGEMENT DEFINITIONS */ + +#define RCDF_PM_PANEL_POWER_ON 0x01000000 + +/* DISPLAY FILTER MSRS */ + +#define RCDF_MBD_MSR_DIAG_DF 0x2010 +#define RCDF_DIAG_32BIT_CRC 0x80000000 + +/* "RCDF_VIDEO_CONFIG" BIT DEFINITIONS */ + +#define RCDF_VCFG_VID_EN 0x00000001 +#define RCDF_VCFG_VID_INP_FORMAT 0x0000000C +#define RCDF_VCFG_X_FILTER_EN 0x00000040 +#define RCDF_VCFG_Y_FILTER_EN 0x00000080 +#define RCDF_VCFG_LINE_SIZE_LOWER_MASK 0x0000FF00 +#define RCDF_VCFG_INIT_READ_MASK 0x01FF0000 +#define RCDF_VCFG_LINE_SIZE_UPPER 0x08000000 +#define RCDF_VCFG_4_2_0_MODE 0x10000000 +#define RCDF_VCFG_UYVY_FORMAT 0x00000000 +#define RCDF_VCFG_Y2YU_FORMAT 0x00000004 +#define RCDF_VCFG_YUYV_FORMAT 0x00000008 +#define RCDF_VCFG_YVYU_FORMAT 0x0000000C + +/* "RCDF_DISPLAY_CONFIG" BIT DEFINITIONS */ + +#define RCDF_DCFG_DIS_EN 0x00000001 +#define RCDF_DCFG_HSYNC_EN 0x00000002 +#define RCDF_DCFG_VSYNC_EN 0x00000004 +#define RCDF_DCFG_DAC_BL_EN 0x00000008 +#define RCDF_DCFG_FP_PWR_EN 0x00000040 +#define RCDF_DCFG_FP_DATA_EN 0x00000080 +#define RCDF_DCFG_CRT_HSYNC_POL 0x00000100 +#define RCDF_DCFG_CRT_VSYNC_POL 0x00000200 +#define RCDF_DCFG_CRT_SYNC_SKW_MASK 0x0001C000 +#define RCDF_DCFG_CRT_SYNC_SKW_INIT 0x00010000 +#define RCDF_DCFG_PWR_SEQ_DLY_MASK 0x000E0000 +#define RCDF_DCFG_PWR_SEQ_DLY_INIT 0x00080000 +#define RCDF_DCFG_VG_CK 0x00100000 +#define RCDF_DCFG_GV_PAL_BYP 0x00200000 +#define RCDF_DAC_VREF 0x04000000 +#define RCDF_FP_ON_STATUS 0x08000000 + +/* "RCDF_VID_MISC" BIT DEFINITIONS */ + +#define RCDF_GAMMA_BYPASS_BOTH 0x00000001 +#define RCDF_DAC_POWER_DOWN 0x00000400 +#define RCDF_ANALOG_POWER_DOWN 0x00000800 + +/* "RCDF_VIDEO_DOWNSCALER_CONTROL" BIT DEFINITIONS */ + +#define RCDF_VIDEO_DOWNSCALE_ENABLE 0x00000001 +#define RCDF_VIDEO_DOWNSCALE_FACTOR_POS 1 +#define RCDF_VIDEO_DOWNSCALE_FACTOR_MASK 0x0000001E +#define RCDF_VIDEO_DOWNSCALE_TYPE_A 0x00000000 +#define RCDF_VIDEO_DOWNSCALE_TYPE_B 0x00000040 +#define RCDF_VIDEO_DOWNSCALE_TYPE_MASK 0x00000040 + +/* "RCDF_VIDEO_DOWNSCALER_COEFFICIENTS" BIT DEFINITIONS */ + +#define RCDF_VIDEO_DOWNSCALER_COEF1_POS 0 +#define RCDF_VIDEO_DOWNSCALER_COEF2_POS 8 +#define RCDF_VIDEO_DOWNSCALER_COEF3_POS 16 +#define RCDF_VIDEO_DOWNSCALER_COEF4_POS 24 +#define RCDF_VIDEO_DOWNSCALER_COEF_MASK 0xF + +/* VIDEO DE-INTERLACING AND ALPHA CONTROL */ + +#define RCDF_NO_CK_OUTSIDE_ALPHA 0x00000100 +#define RCDF_CSC_VIDEO_YUV_TO_RGB 0x00000400 +#define RCDF_VIDEO_INPUT_IS_RGB 0x00002000 +#define RCDF_ALPHA1_PRIORITY_POS 16 +#define RCDF_ALPHA1_PRIORITY_MASK 0x00030000 +#define RCDF_ALPHA2_PRIORITY_POS 18 +#define RCDF_ALPHA2_PRIORITY_MASK 0x000C0000 +#define RCDF_ALPHA3_PRIORITY_POS 20 +#define RCDF_ALPHA3_PRIORITY_MASK 0x00300000 + +/* VIDEO CURSOR COLOR KEY DEFINITIONS */ + +#define RCDF_CURSOR_COLOR_KEY_ENABLE 0x20000000 +#define RCDF_CURSOR_COLOR_KEY_OFFSET_POS 24 +#define RCDF_CURSOR_COLOR_BITS 23 +#define RCDF_COLOR_MASK 0x00FFFFFF /* 24 significant bits */ + +/* ALPHA COLOR BIT DEFINITION (REGISTERS 0x68, 0x78, AND 0x88) */ + +#define RCDF_ALPHA_COLOR_ENABLE 0x01000000 + +/* ALPHA CONTROL BIT DEFINITIONS (REGISTERS 0x6C, 0x7C, AND 0x8C) */ + +#define RCDF_ACTRL_WIN_ENABLE 0x00010000 +#define RCDF_ACTRL_LOAD_ALPHA 0x00020000 + +/* VIDEO REQUEST DEFINITIONS (REGISTER 0x90) */ + +#define RCDF_VIDEO_Y_REQUEST_POS 0 +#define RCDF_VIDEO_X_REQUEST_POS 16 +#define RCDF_VIDEO_REQUEST_MASK 0x000007FF + +/* GEODELINK DEVICE MSR REGISTER SUMMARY */ + +#define MBD_MSR_CAP 0x2000 /* Device Capabilities */ +#define MBD_MSR_CONFIG 0x2001 /* Device Master Configuration Register */ +#define MBD_MSR_SMI 0x2002 /* MBus Device SMI Register */ +#define MBD_MSR_ERROR 0x2003 /* MBus Device Error */ +#define MBD_MSR_PM 0x2004 /* MBus Device Power Management Register */ +#define MBD_MSR_DIAG 0x2005 /* Mbus Device Diagnostic Register */ + +/* DISPLAY FILTER MBD_MSR_DIAG DEFINITIONS */ + +#define RCDF_MBD_DIAG_SEL0 0x00007FFF /* Lower 32-bits of Diag Bus Select */ +#define RCDF_MBD_DIAG_EN0 0x00008000 /* Enable for lower 32-bits of diag bus */ +#define RCDF_MBD_DIAG_SEL1 0x7FFF0000 /* Upper 32-bits of Diag Bus Select */ +#define RCDF_MBD_DIAG_EN1 0x80000000 /* Enable for upper 32-bits of diag bus */ + +/* DISPLAY FILTER MBD_MSR_CONFIG DEFINITIONS */ + +#define RCDF_CONFIG_FMT_MASK 0x00000038 /* Output Format */ +#define RCDF_CONFIG_FMT_CRT 0x00000000 +#define RCDF_CONFIG_FMT_FP 0x00000008 + +/* MCP MSR DEFINITIONS */ + +#define MCP_CLKOFF 0x0010 +#define MCP_CLKACTIVE 0x0011 +#define MCP_CLKDISABLE 0x0012 +#define MCP_CLK4ACK 0x0013 +#define MCP_SYS_RSTPLL 0x0014 +#define MCP_DOTPLL 0x0015 +#define MCP_DBGCLKCTL 0x0016 +#define MCP_RC_REVID 0x0017 +#define MCP_SETM0CTL 0x0040 +#define MCP_SETN0CTL 0x0048 +#define MCP_CMPVAL0 0x0050 +#define MCP_CMPMASK0 0x0051 +#define MCP_REGA 0x0058 +#define MCP_REGB 0x0059 +#define MCP_REGAMASK 0x005A +#define MCP_REGAVAL 0x005B +#define MCP_REGBMASK 0x005C +#define MCP_REGBVAL 0x005D +#define MCP_FIFOCTL 0x005E +#define MCP_DIAGCTL 0x005F +#define MCP_H0CTL 0x0060 +#define MCP_XSTATE 0x0066 +#define MCP_YSTATE 0x0067 +#define MCP_ACTION0 0x0068 + +/* MCP_SYS_RSTPLL DEFINITIONS */ + +#define MCP_DOTPOSTDIV3 0x00000008 +#define MCP_DOTPREMULT2 0x00000004 +#define MCP_DOTPREDIV2 0x00000002 + +/* MCP MBD_MSR_DIAG DEFINITIONS */ + +#define MCP_MBD_DIAG_SEL0 0x00000007 +#define MCP_MBD_DIAG_EN0 0x00008000 +#define MCP_MBD_DIAG_SEL1 0x00070000 +#define MCP_MBD_DIAG_EN1 0x80000000 + +/* MCP_DOTPLL DEFINITIONS */ + +#define MCP_DOTPLL_P 0x00000003 +#define MCP_DOTPLL_N 0x000001FC +#define MCP_DOTPLL_M 0x00001E00 +#define MCP_DOTPLL_LOCK 0x02000000 +#define MCP_DOTPLL_BYPASS 0x00008000 + + +/*---------------------------------------------------*/ +/* THIRD GENERATION DISPLAY CONTROLLER (CASTLE) */ +/*---------------------------------------------------*/ + +#define DC3_UNLOCK 0x00000000 /* Unlock register */ +#define DC3_GENERAL_CFG 0x00000004 /* Config registers */ +#define DC3_DISPLAY_CFG 0x00000008 + +#define DC3_FB_ST_OFFSET 0x00000010 /* Frame buffer start offset */ +#define DC3_CB_ST_OFFSET 0x00000014 /* Compression start offset */ +#define DC3_CURS_ST_OFFSET 0x00000018 /* Cursor buffer start offset */ +#define DC3_VID_Y_ST_OFFSET 0x00000020 /* Video Y Buffer start offset */ +#define DC3_VID_U_ST_OFFSET 0x00000024 /* Video U Buffer start offset */ +#define DC3_VID_V_ST_OFFSET 0x00000028 /* Video V Buffer start offset */ +#define DC3_LINE_SIZE 0x00000030 /* Video, CB, and FB line sizes */ +#define DC3_GFX_PITCH 0x00000034 /* FB and DB skip counts */ +#define DC3_VID_YUV_PITCH 0x00000038 /* Y, U and V buffer skip counts */ + +#define DC3_H_ACTIVE_TIMING 0x00000040 /* Horizontal timings */ +#define DC3_H_BLANK_TIMING 0x00000044 +#define DC3_H_SYNC_TIMING 0x00000048 +#define DC3_V_ACTIVE_TIMING 0x00000050 /* Vertical Timings */ +#define DC3_V_BLANK_TIMING 0x00000054 +#define DC3_V_SYNC_TIMING 0x00000058 + +#define DC3_CURSOR_X 0x00000060 /* Cursor X position */ +#define DC3_CURSOR_Y 0x00000064 /* Cursor Y Position */ +#define DC3_LINE_CNT_STATUS 0x0000006C /* Icon Y Position */ + +#define DC3_PAL_ADDRESS 0x00000070 /* Palette Address */ +#define DC3_PAL_DATA 0x00000074 /* Palette Data */ +#define DC3_DFIFO_DIAG 0x00000078 /* Display FIFO diagnostic */ +#define DC3_CFIFO_DIAG 0x0000007C /* Compression FIFO diagnostic */ + +#define DC3_VID_DS_DELTA 0x00000080 /* Vertical Downscaling fraction */ + +#define DC3_PHY_MEM_OFFSET 0x00000084 /* VG Base Address Register */ +#define DC3_DV_CTL 0x00000088 /* Dirty-Valid Control Register */ +#define DC3_DV_ACC 0x0000008C /* Dirty-Valid RAM Access */ + +#define DC3_COLOR_KEY 0x000000B8 /* Graphics color key */ +#define DC3_COLOR_MASK 0x000000BC /* Graphics color key mask */ + +/* UNLOCK VALUE */ + +#define DC3_UNLOCK_VALUE 0x00004758 /* used to unlock DC regs */ + +/* VG MBUS DEVICE SMI MSR FIELDS */ + +#define DC3_VG_BL_MASK 0x00000001 +#define DC3_MISC_MASK 0x00000002 +#define DC3_ISR0_MASK 0x00000004 +#define DC3_VGA_BL_MASK 0x00000008 +#define DC3_CRTCIO_MSK 0x00000010 +#define DC3_VG_BLANK_SMI 0x00000001 +#define DC3_MISC_SMI 0x00000002 +#define DC3_ISR0_SMI 0x00000004 +#define DC3_VGA_BLANK_SMI 0x00000008 +#define DC3_CRTCIO_SMI 0x00000010 + +/* DC3_GENERAL_CFG BIT FIELDS */ + +#define DC3_GCFG_DBUG 0x80000000 +#define DC3_GCFG_DBSL 0x40000000 +#define DC3_GCFG_CFRW 0x20000000 +#define DC3_GCFG_DIAG 0x10000000 +#define DC3_GCFG_GXRFS4 0x08000000 +#define DC3_GCFG_SGFR 0x04000000 +#define DC3_GCFG_SGRE 0x02000000 +#define DC3_GCFG_SIGE 0x01000000 +#define DC3_GCFG_YUVM 0x00100000 +#define DC3_GCFG_VDSE 0x00080000 +#define DC3_GCFG_VGAFT 0x00040000 +#define DC3_GCFG_FDTY 0x00020000 +#define DC3_GCFG_STFM 0x00010000 +#define DC3_GCFG_DFHPEL_MASK 0x0000F000 +#define DC3_GCFG_DFHPSL_MASK 0x00000F00 +#define DC3_GCFG_VGAE 0x00000080 +#define DC3_GCFG_DECE 0x00000040 +#define DC3_GCFG_CMPE 0x00000020 +#define DC3_GCFG_VIDE 0x00000008 +#define DC3_GCFG_ICNE 0x00000004 +#define DC3_GCFG_CURE 0x00000002 +#define DC3_GCFG_DFLE 0x00000001 + +/* DC3_DISPLAY_CFG BIT FIELDS */ + +#define DC3_DCFG_A20M 0x80000000 +#define DC3_DCFG_A18M 0x40000000 +#define DC3_DCFG_VISL 0x08000000 +#define DC3_DCFG_FRLK 0x04000000 +#define DC3_DCFG_PALB 0x02000000 +#define DC3_DCFG_PIX_PAN_MASK 0x00F00000 +#define DC3_DCFG_DCEN 0x00080000 +#define DC3_DCFG_16BPP_MODE_MASK 0x00000C00 +#define DC3_DCFG_16BPP 0x00000000 +#define DC3_DCFG_15BPP 0x00000400 +#define DC3_DCFG_12BPP 0x00000800 +#define DC3_DCFG_DISP_MODE_MASK 0x00000300 +#define DC3_DCFG_DISP_MODE_8BPP 0x00000000 +#define DC3_DCFG_DISP_MODE_16BPP 0x00000100 +#define DC3_DCFG_DISP_MODE_24BPP 0x00000200 +#define DC3_DCFG_SCLE 0x00000080 +#define DC3_DCFG_TRUP 0x00000040 +#define DC3_DCFG_VIEN 0x00000020 +#define DC3_DCFG_VDEN 0x00000010 +#define DC3_DCFG_GDEN 0x00000008 +#define DC3_DCFG_VCKE 0x00000004 +#define DC3_DCFG_PCKE 0x00000002 +#define DC3_DCFG_TGEN 0x00000001 + +/* DC3_LINE_CNT BIT FIELDS */ + +#define DC3_LNCNT_DNA 0x80000000 +#define DC3_LNCNT_VNA 0x40000000 +#define DC3_LNCNT_VSA 0x20000000 +#define DC3_LNCNT_VINT 0x10000000 +#define DC3_LNCNT_FLIP 0x08000000 +#define DC3_LNCNT_V_LINE_CNT 0x07FF0000 +#define DC3_LNCNT_VFLIP 0x00008000 +#define DC3_LNCNT_SIGC 0x00004000 +#define DC3_LNCNT_SS_LINE_CMP 0x000007FF + +/* DC3_FB_ST_OFFSET BIT FIELDS */ + +#define DC3_FB_ST_OFFSET_MASK 0x0FFFFFFF + +/* DC3_CB_ST_OFFSET BIT FIELDS */ + +#define DC3_CB_ST_OFFSET_MASK 0x0FFFFFFF + +/* DC3_CURS_ST_OFFSET BIT FIELDS */ + +#define DC3_CURS_ST_OFFSET_MASK 0x0FFFFFFF + +/* DC3_ICON_ST_OFFSET BIT FIELDS */ + +#define DC3_ICON_ST_OFFSET_MASK 0x0FFFFFFF + +/* DC3_VID_Y_ST_OFFSET BIT FIELDS */ + +#define DC3_VID_Y_ST_OFFSET_MASK 0x0FFFFFFF + +/* DC3_VID_U_ST_OFFSET BIT FIELDS */ + +#define DC3_VID_U_ST_OFFSET_MASK 0x0FFFFFFF + +/* DC3_VID_V_ST_OFFSET BIT FIELDS */ + +#define DC3_VID_V_ST_OFFSET_MASK 0x0FFFFFFF + +/* DC3_LINE_SIZE BIT FIELDS */ + +#define DC3_LINE_SIZE_VLS_MASK 0x3FF00000 +#define DC3_LINE_SIZE_CBLS_MASK 0x0007F000 +#define DC3_LINE_SIZE_FBLS_MASK 0x000003FF +#define DC3_LINE_SIZE_CB_SHIFT 12 +#define DC3_LINE_SIZE_VB_SHIFT 20 + +/* DC3_GFX_PITCH BIT FIELDS */ + +#define DC3_GFX_PITCH_CBP_MASK 0xFFFF0000 +#define DC3_GFX_PITCH_FBP_MASK 0x0000FFFF + +/* DC3_VID_YUV_PITCH BIT FIELDS */ + +#define DC3_YUV_PITCH_UVP_MASK 0xFFFF0000 +#define DC3_YUV_PITCH_YBP_MASK 0x0000FFFF + +/* DC3_H_ACTIVE_TIMING BIT FIELDS */ + +#define DC3_HAT_HT_MASK 0x0FF80000 +#define DC3_HAT_HA_MASK 0x00000FF8 + +/* DC3_H_BLANK_TIMING BIT FIELDS */ + +#define DC3_HBT_HBE_MASK 0x0FF80000 +#define DC3_HBT_HBS_MASK 0x00000FF8 + +/* DC3_H_SYNC_TIMING BIT FIELDS */ + +#define DC3_HST_HSE_MASK 0x0FF80000 +#define DC3_HST_HSS_MASK 0x00000FF8 + +/* DC3_V_ACTIVE_TIMING BIT FIELDS */ + +#define DC3_VAT_VT_MASK 0x07FF0000 +#define DC3_VAT_VA_MASK 0x000007FF + +/* DC3_V_BLANK_TIMING BIT FIELDS */ + +#define DC3_VBT_VBE_MASK 0x07FF0000 +#define DC3_VBT_VBS_MASK 0x000007FF + +/* DC3_V_SYNC_TIMING BIT FIELDS */ + +#define DC3_VST_VSE_MASK 0x07FF0000 +#define DC3_VST_VSS_MASK 0x000007FF + +/* DC3_DV_CTL BIT DEFINITIONS */ + +#define DC3_DV_LINE_SIZE_MASK 0x00000C00 +#define DC3_DV_LINE_SIZE_1024 0x00000000 +#define DC3_DV_LINE_SIZE_2048 0x00000400 +#define DC3_DV_LINE_SIZE_4096 0x00000800 +#define DC3_DV_LINE_SIZE_8192 0x00000C00 + +#define DC3_CLR_KEY_DATA_MASK 0x00FFFFFF +#define DC3_CLR_KEY_ENABLE 0x01000000 +#define DC3_CLR_KEY_INVERT 0x02000000 + +/* VGA DEFINITIONS */ + +#define DC3_SEQUENCER_INDEX 0x03C4 +#define DC3_SEQUENCER_DATA 0x03C5 +#define DC3_SEQUENCER_RESET 0x00 +#define DC3_SEQUENCER_CLK_MODE 0x01 + +#define DC3_RESET_VGA_DISP_ENABLE 0x03 +#define DC3_CLK_MODE_SCREEN_OFF 0x20 + +/*---------------------------------------------------*/ +/* CASTLE DISPLAY FILTER */ +/*---------------------------------------------------*/ + +/* CASTLE VIDEO REGISTER DEFINITIONS */ + +#define CASTLE_VIDEO_CONFIG 0x000 +#define CASTLE_DISPLAY_CONFIG 0x008 +#define CASTLE_VIDEO_X_POS 0x010 +#define CASTLE_VIDEO_Y_POS 0x018 +#define CASTLE_VIDEO_COLOR_KEY 0x028 +#define CASTLE_VIDEO_COLOR_MASK 0x030 +#define CASTLE_PALETTE_ADDRESS 0x038 +#define CASTLE_PALETTE_DATA 0x040 +#define CASTLE_VID_MISC 0x050 +#define CASTLE_VID_CLOCK_SELECT 0x058 +#define CASTLE_VIDEO_YSCALE 0x060 +#define CASTLE_VIDEO_XSCALE 0x068 +#define CASTLE_VIDEO_DOWNSCALER_CONTROL 0x078 +#define CASTLE_VID_CRC 0x088 +#define CASTLE_VID_CRC32 0x090 +#define CASTLE_VID_ALPHA_CONTROL 0x098 +#define CASTLE_CURSOR_COLOR_KEY 0x0A0 +#define CASTLE_CURSOR_COLOR_MASK 0x0A8 +#define CASTLE_CURSOR_COLOR_1 0x0B0 +#define CASTLE_CURSOR_COLOR_2 0x0B8 +#define CASTLE_ALPHA_XPOS_1 0x0C0 +#define CASTLE_ALPHA_YPOS_1 0x0C8 +#define CASTLE_ALPHA_COLOR_1 0x0D0 +#define CASTLE_ALPHA_CONTROL_1 0x0D8 +#define CASTLE_ALPHA_XPOS_2 0x0E0 +#define CASTLE_ALPHA_YPOS_2 0x0E8 +#define CASTLE_ALPHA_COLOR_2 0x0F0 +#define CASTLE_ALPHA_CONTROL_2 0x0F8 +#define CASTLE_ALPHA_XPOS_3 0x100 +#define CASTLE_ALPHA_YPOS_3 0x108 +#define CASTLE_ALPHA_COLOR_3 0x110 +#define CASTLE_ALPHA_CONTROL_3 0x118 +#define CASTLE_VIDEO_REQUEST 0x120 +#define CASTLE_ALPHA_WATCH 0x128 +#define CASTLE_VIDEO_TEST_MODE 0x210 +#define CASTLE_POWER_MANAGEMENT 0x410 + +/* DISPLAY FILTER POWER MANAGEMENT DEFINITIONS */ + +#define CASTLE_PM_PANEL_POWER_ON 0x01000000 + +/* DISPLAY FILTER MSRS */ + +#define CASTLE_MBD_MSR_DIAG_DF 0x2010 +#define CASTLE_DIAG_32BIT_CRC 0x80000000 + +/* "CASTLE_VIDEO_CONFIG" BIT DEFINITIONS */ + +#define CASTLE_VCFG_VID_EN 0x00000001 +#define CASTLE_VCFG_VID_INP_FORMAT 0x0000000C +#define CASTLE_VCFG_SCALER_BYPASS 0x00000020 +#define CASTLE_VCFG_X_FILTER_EN 0x00000040 +#define CASTLE_VCFG_Y_FILTER_EN 0x00000080 +#define CASTLE_VCFG_LINE_SIZE_LOWER_MASK 0x0000FF00 +#define CASTLE_VCFG_INIT_READ_MASK 0x01FF0000 +#define CASTLE_VCFG_LINE_SIZE_UPPER 0x08000000 +#define CASTLE_VCFG_4_2_0_MODE 0x10000000 +#define CASTLE_VCFG_UYVY_FORMAT 0x00000000 +#define CASTLE_VCFG_Y2YU_FORMAT 0x00000004 +#define CASTLE_VCFG_YUYV_FORMAT 0x00000008 +#define CASTLE_VCFG_YVYU_FORMAT 0x0000000C + +/* "CASTLE_DISPLAY_CONFIG" BIT DEFINITIONS */ + +#define CASTLE_DCFG_DIS_EN 0x00000001 +#define CASTLE_DCFG_HSYNC_EN 0x00000002 +#define CASTLE_DCFG_VSYNC_EN 0x00000004 +#define CASTLE_DCFG_DAC_BL_EN 0x00000008 +#define CASTLE_DCFG_FP_PWR_EN 0x00000040 +#define CASTLE_DCFG_FP_DATA_EN 0x00000080 +#define CASTLE_DCFG_CRT_HSYNC_POL 0x00000100 +#define CASTLE_DCFG_CRT_VSYNC_POL 0x00000200 +#define CASTLE_DCFG_CRT_SYNC_SKW_MASK 0x0001C000 +#define CASTLE_DCFG_CRT_SYNC_SKW_INIT 0x00010000 +#define CASTLE_DCFG_PWR_SEQ_DLY_MASK 0x000E0000 +#define CASTLE_DCFG_PWR_SEQ_DLY_INIT 0x00080000 +#define CASTLE_DCFG_VG_CK 0x00100000 +#define CASTLE_DCFG_GV_PAL_BYP 0x00200000 +#define CASTLE_DAC_VREF 0x04000000 +#define CASTLE_FP_ON_STATUS 0x08000000 + +/* "CASTLE_VID_MISC" BIT DEFINITIONS */ + +#define CASTLE_GAMMA_BYPASS_BOTH 0x00000001 +#define CASTLE_DAC_POWER_DOWN 0x00000400 +#define CASTLE_ANALOG_POWER_DOWN 0x00000800 + +/* "CASTLE_VIDEO_DOWNSCALER_CONTROL" BIT DEFINITIONS */ + +#define CASTLE_VIDEO_DOWNSCALE_ENABLE 0x00000001 +#define CASTLE_VIDEO_DOWNSCALE_FACTOR_POS 1 +#define CASTLE_VIDEO_DOWNSCALE_FACTOR_MASK 0x0000001E +#define CASTLE_VIDEO_DOWNSCALE_TYPE_A 0x00000000 +#define CASTLE_VIDEO_DOWNSCALE_TYPE_B 0x00000040 +#define CASTLE_VIDEO_DOWNSCALE_TYPE_MASK 0x00000040 + +/* "CASTLE_VIDEO_DOWNSCALER_COEFFICIENTS" BIT DEFINITIONS */ + +#define CASTLE_VIDEO_DOWNSCALER_COEF1_POS 0 +#define CASTLE_VIDEO_DOWNSCALER_COEF2_POS 8 +#define CASTLE_VIDEO_DOWNSCALER_COEF3_POS 16 +#define CASTLE_VIDEO_DOWNSCALER_COEF4_POS 24 +#define CASTLE_VIDEO_DOWNSCALER_COEF_MASK 0xF + +/* VIDEO DE-INTERLACING AND ALPHA CONTROL */ + +#define CASTLE_NO_CK_OUTSIDE_ALPHA 0x00000100 +#define CASTLE_CSC_VIDEO_YUV_TO_RGB 0x00000400 +#define CASTLE_VIDEO_INPUT_IS_RGB 0x00002000 +#define CASTLE_ALPHA1_PRIORITY_POS 16 +#define CASTLE_ALPHA1_PRIORITY_MASK 0x00030000 +#define CASTLE_ALPHA2_PRIORITY_POS 18 +#define CASTLE_ALPHA2_PRIORITY_MASK 0x000C0000 +#define CASTLE_ALPHA3_PRIORITY_POS 20 +#define CASTLE_ALPHA3_PRIORITY_MASK 0x00300000 + +/* VIDEO CURSOR COLOR KEY DEFINITIONS */ + +#define CASTLE_CURSOR_COLOR_KEY_ENABLE 0x20000000 +#define CASTLE_CURSOR_COLOR_KEY_OFFSET_POS 24 +#define CASTLE_CURSOR_COLOR_BITS 23 +#define CASTLE_COLOR_MASK 0x00FFFFFF /* 24 significant bits */ + +/* ALPHA COLOR BIT DEFINITION (REGISTERS 0x68, 0x78, AND 0x88) */ + +#define CASTLE_ALPHA_COLOR_ENABLE 0x01000000 + +/* ALPHA CONTROL BIT DEFINITIONS (REGISTERS 0x6C, 0x7C, AND 0x8C) */ + +#define CASTLE_ACTRL_WIN_ENABLE 0x00010000 +#define CASTLE_ACTRL_LOAD_ALPHA 0x00020000 + +/* VIDEO REQUEST DEFINITIONS (REGISTER 0x90) */ + +#define CASTLE_VIDEO_Y_REQUEST_POS 0 +#define CASTLE_VIDEO_X_REQUEST_POS 16 +#define CASTLE_VIDEO_REQUEST_MASK 0x000007FF + +/* END OF FILE */ + diff --git a/Source/DirectFB/gfxdrivers/nsc/include/gfx_type.h b/Source/DirectFB/gfxdrivers/nsc/include/gfx_type.h new file mode 100755 index 0000000..71be2d9 --- /dev/null +++ b/Source/DirectFB/gfxdrivers/nsc/include/gfx_type.h @@ -0,0 +1,426 @@ +/* + * $Workfile: gfx_type.h $ + * + * This header file defines the pneumonics used when calling Durango routines. + * This file is automatically included by gfx_rtns.h + */ + +/* NSC_LIC_ALTERNATIVE_PREAMBLE + * + * Revision 1.0 + * + * National Semiconductor Alternative GPL-BSD License + * + * National Semiconductor Corporation licenses this software + * ("Software"): + * + * National Xfree frame buffer driver + * + * under one of the two following licenses, depending on how the + * Software is received by the Licensee. + * + * If this Software is received as part of the Linux Framebuffer or + * other GPL licensed software, then the GPL license designated + * NSC_LIC_GPL applies to this Software; in all other circumstances + * then the BSD-style license designated NSC_LIC_BSD shall apply. + * + * END_NSC_LIC_ALTERNATIVE_PREAMBLE */ + +/* NSC_LIC_BSD + * + * National Semiconductor Corporation Open Source License for + * + * National Xfree frame buffer driver + * + * (BSD License with Export Notice) + * + * Copyright (c) 1999-2001 + * National Semiconductor Corporation. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * * Redistributions in binary form must reproduce the above + * copyright notice, this list of conditions and the following + * disclaimer in the documentation and/or other materials provided + * with the distribution. + * + * * Neither the name of the National Semiconductor Corporation nor + * the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior + * written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER + * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE, + * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF + * YOUR JURISDICTION. It is licensee's responsibility to comply with + * any export regulations applicable in licensee's jurisdiction. Under + * CURRENT (2001) U.S. export regulations this software + * is eligible for export from the U.S. and can be downloaded by or + * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed + * destinations which include Cuba, Iraq, Libya, North Korea, Iran, + * Syria, Sudan, Afghanistan and any other country to which the U.S. + * has embargoed goods and services. + * + * END_NSC_LIC_BSD */ + +/* NSC_LIC_GPL + * + * National Semiconductor Corporation Gnu General Public License for + * + * National Xfree frame buffer driver + * + * (GPL License with Export Notice) + * + * Copyright (c) 1999-2001 + * National Semiconductor Corporation. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted under the terms of the GNU General + * Public License as published by the Free Software Foundation; either + * version 2 of the License, or (at your option) any later version + * + * In addition to the terms of the GNU General Public License, neither + * the name of the National Semiconductor Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER + * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE, + * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. See the GNU General Public License for more details. + * + * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF + * YOUR JURISDICTION. It is licensee's responsibility to comply with + * any export regulations applicable in licensee's jurisdiction. Under + * CURRENT (2001) U.S. export regulations this software + * is eligible for export from the U.S. and can be downloaded by or + * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed + * destinations which include Cuba, Iraq, Libya, North Korea, Iran, + * Syria, Sudan, Afghanistan and any other country to which the U.S. + * has embargoed goods and services. + * + * You should have received a copy of the GNU General Public License + * along with this file; if not, write to the Free Software Foundation, + * Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + * END_NSC_LIC_GPL */ + + +#ifndef _gfx_type_h +#define _gfx_type_h + +/* MSR DEFINITIONS */ + +typedef enum DevStatus { FOUND, NOT_KNOWN, REQ_NOT_FOUND, REQ_NOT_INSTALLED } DEV_STATUS; + +typedef struct msr { + DEV_STATUS Present; /* Node enumeration status */ + unsigned char Id; /* Device ID (from MSR specs) */ + unsigned long Address; /* Address - 32-bit MBus address at which 'Id' is found */ +} MSR; + +typedef struct mValue { + unsigned long high; + unsigned long low; +} Q_WORD; + +typedef struct mbusNode { + unsigned long address; + unsigned int deviceId; + unsigned int claimed; +} MBUS_NODE; + +/* MSR ARRAY INDEXES */ +/* These are indexes into the array of MBus devices. These */ +/* should not be confused with the class codes at MSR register */ +/* 0x2000. */ + +#define RC_ID_MBIU0 0x00 +#define RC_ID_MBIU1 0x01 +#define RC_ID_MCP 0x02 +#define RC_ID_MPCI 0x03 +#define RC_ID_MC 0x04 +#define RC_ID_GP 0x05 +#define RC_ID_VG 0x06 +#define RC_ID_DF 0x07 +#define RC_ID_FG 0x08 +#define RC_ID_VA 0x09 +#define CP_ID_MBIU 0x0A +#define CP_ID_MPCI 0x0B +#define CP_ID_USB2 0x0C +#define CP_ID_ATAC 0x0D +#define CP_ID_MDD 0x0E +#define CP_ID_ACC 0x0F +#define CP_ID_USB1 0x10 +#define CP_ID_MCP 0x11 + +/* MBUS DEVICE CLASS CODES */ +/* These are the device ids for the known Redcloud MBus devices. */ + +#define RC_CC_MBIU 0x01 +#define RC_CC_MCP 0x02 +#define RC_CC_MPCI 0x05 +#define RC_CC_MC 0x20 +#define RC_CC_GP 0x3D +#define RC_CC_VG 0x3E +#define RC_CC_DF 0x3F +#define RC_CC_FG 0xF0 +#define RC_CC_VA 0x86 +#define CP_CC_MBIU 0x01 +#define CP_CC_MPCI 0x05 +#define CP_CC_USB2 0x42 +#define CP_CC_ATAC 0x47 +#define CP_CC_MDD 0xDF +#define CP_CC_ACC 0x33 +#define CP_CC_USB1 0x42 +#define CP_CC_MCP 0x02 + +/* VAIL AND MBIUS ARE AT KNOWN ADDRESSES */ +/* We can initialize the addresses of these devices in advance, */ +/* as their location should never change. */ + +#define RC_MB0_MBIU0 0x10000000 +#define RC_MB0_MBIU1 0x40000000 +#define CP_MB0_MBIU0 0x51010000 +#define RC_MB0_CPU 0x00000000 +#define FAKE_ADDRESS 0xFFFFFFFF + +/* MSR PORT DESCRIPTORS */ + +#define NOT_POPULATED 0 +#define NOT_INSTALLED 0xFFFE +#define REFLECTIVE 0xFFFF + +/* CRC DATA SOURCES */ + +#define CRC_SOURCE_GFX_DATA 0x00 +#define CRC_SOURCE_CRT_RGB 0x01 +#define CRC_SOURCE_FP_DATA 0x02 + + +/* TV DEFINITIONS */ + +typedef enum TVStandardType { + TV_STANDARD_NTSC = 1, + TV_STANDARD_PAL +} TVStandardType; + +typedef enum GfxOnTVType { + GFX_ON_TV_SQUARE_PIXELS = 1, + GFX_ON_TV_NO_SCALING +} GfxOnTVType; + +#define CRT_DISABLE 0x00 +#define CRT_ENABLE 0x01 +#define CRT_STANDBY 0x02 +#define CRT_SUSPEND 0x03 + +#define TV_OUTPUT_COMPOSITE 0x01 +#define TV_OUTPUT_S_VIDEO 0x02 +#define TV_OUTPUT_YUV 0x03 +#define TV_OUTPUT_SCART 0x04 + +#define TV_FLICKER_FILTER_NONE 0x01 +#define TV_FLICKER_FILTER_NORMAL 0x02 +#define TV_FLICKER_FILTER_INTERLACED 0x03 + +#define TV_YC_DELAY_NONE 0x01 +#define TV_Y_DELAY_ONE_PIXEL 0x02 +#define TV_C_DELAY_ONE_PIXEL 0x03 +#define TV_C_DELAY_TWO_PIXELS 0x04 + +#define TV_SUB_CARRIER_RESET_NEVER 0x01 +#define TV_SUB_CARRIER_RESET_EVERY_TWO_LINES 0x02 +#define TV_SUB_CARRIER_RESET_EVERY_TWO_FRAMES 0x03 +#define TV_SUB_CARRIER_RESET_EVERY_FOUR_FRAMES 0x04 + +#define TVENC_RESET_EVERY_ODD_FIELD 0x01 +#define TVENC_RESET_EVERY_EVEN_FIELD 0x02 +#define TVENC_RESET_NEXT_ODD_FIELD 0x03 +#define TVENC_RESET_NEXT_EVEN_FIELD 0x04 +#define TVENC_RESET_EVERY_FIELD 0x05 +#define TVENC_RESET_EVERY_X_ODD_FIELDS 0x06 +#define TVENC_RESET_EVERY_X_EVEN_FIELDS 0x07 + +/* VBI FORMATS */ + +#define VBI_FORMAT_VIDEO 0x1 +#define VBI_FORMAT_RAW 0x2 +#define VBI_FORMAT_CC 0x4 +#define VBI_FORMAT_NABTS 0x8 + +/* VIDEO DEFINITIONS */ + +#define VIDEO_FORMAT_UYVY 0x0 +#define VIDEO_FORMAT_Y2YU 0x1 +#define VIDEO_FORMAT_YUYV 0x2 +#define VIDEO_FORMAT_YVYU 0x3 +#define VIDEO_FORMAT_Y0Y1Y2Y3 0x4 +#define VIDEO_FORMAT_Y3Y2Y1Y0 0x5 +#define VIDEO_FORMAT_Y1Y0Y3Y2 0x6 +#define VIDEO_FORMAT_Y1Y2Y3Y0 0x7 +#define VIDEO_FORMAT_RGB 0x8 +#define VIDEO_FORMAT_P2M_P2L_P1M_P1L 0x9 +#define VIDEO_FORMAT_P1M_P1L_P2M_P2L 0xA +#define VIDEO_FORMAT_P1M_P2L_P2M_P1L 0xB + +#define VIDEO_DOWNSCALE_KEEP_1_OF 0x1 +#define VIDEO_DOWNSCALE_DROP_1_OF 0x2 + +typedef enum VideoSourceType { /* The source from which the video processor shows full screen video */ + VIDEO_SOURCE_MEMORY = 1, + VIDEO_SOURCE_DVIP +} VideoSourceType; + +typedef enum VbiSourceType { /* The source from which the video processor takes VBI */ + VBI_SOURCE_MEMORY = 1, + VBI_SOURCE_DVIP +} VbiSourceType; + +/* GENLOCK DEFINITIONS */ + +#define GENLOCK_SINGLE 0x001 +#define GENLOCK_FIELD_SYNC 0x001 +#define GENLOCK_CONTINUOUS 0x002 +#define GENLOCK_SYNCED_EDGE_FALLING 0x004 +#define GENLOCK_SYNCING_EDGE_FALLING 0x008 +#define GENLOCK_TIMEOUT 0x010 +#define GENLOCK_TVENC_RESET_EVEN_FIELD 0x020 +#define GENLOCK_TVENC_RESET_BEFORE_DELAY 0x040 +#define GENLOCK_TVENC_RESET 0x080 +#define GENLOCK_SYNC_TO_TVENC 0x100 + +/* VIP DEFINITIONS */ + +#define VIP_MODE_C 0x1 + +#define VIP_CAPTURE_STOP_LINE 0x1 +#define VIP_CAPTURE_STOP_FIELD 0x2 +#define VIP_CAPTURE_START_FIELD 0x4 + +#define VBI_ANCILLARY 0x1 +#define VBI_TASK_A 0x2 +#define VBI_TASK_B 0x4 + +/* VGA STRUCTURE */ + +#define GFX_STD_CRTC_REGS 25 +#define GFX_EXT_CRTC_REGS 16 + +#define GFX_VGA_FLAG_MISC_OUTPUT 0x00000001 +#define GFX_VGA_FLAG_STD_CRTC 0x00000002 +#define GFX_VGA_FLAG_EXT_CRTC 0x00000004 + +/* FS450 TV Standard flags */ + +#define GFX_TV_STANDARD_NTSC_M 0x0001 +#define GFX_TV_STANDARD_NTSC_M_J 0x0002 +#define GFX_TV_STANDARD_PAL_B 0x0004 +#define GFX_TV_STANDARD_PAL_D 0x0008 +#define GFX_TV_STANDARD_PAL_H 0x0010 +#define GFX_TV_STANDARD_PAL_I 0x0020 +#define GFX_TV_STANDARD_PAL_M 0x0040 +#define GFX_TV_STANDARD_PAL_N 0x0080 +#define GFX_TV_STANDARD_PAL_G 0x0100 + +/* FS450 VGA Mode flags */ + +#define GFX_VGA_MODE_UNKNOWN 0 +#define GFX_VGA_MODE_640X480 0x0001 +#define GFX_VGA_MODE_720X487 0x0002 +#define GFX_VGA_MODE_720X576 0x0004 +#define GFX_VGA_MODE_800X600 0x0008 +#define GFX_VGA_MODE_1024X768 0x0010 + +/* FS450 TVout mode flags */ + +#define GFX_TVOUT_MODE_CVBS 0x0001 +#define GFX_TVOUT_MODE_YC 0x0002 +#define GFX_TVOUT_MODE_RGB 0x0004 +#define GFX_TVOUT_MODE_CVBS_YC (GFX_TVOUT_MODE_CVBS | GFX_TVOUT_MODE_YC) + +/* FS450 Luma and Chroma Filters */ + +#define GFX_LUMA_FILTER 0x0001 +#define GFX_CHROMA_FILTER 0x0002 + +/* APS Trigger Bits */ + +#define GFX_APS_TRIGGER_OFF 0 +#define GFX_APS_TRIGGER_AGC_ONLY 1 +#define GFX_APS_TRIGGER_AGC_2_LINE 2 +#define GFX_APS_TRIGGER_AGC_4_LINE 3 + +typedef struct { + int xsize; + int ysize; + int hz; + int clock; + unsigned char miscOutput; + unsigned char stdCRTCregs[GFX_STD_CRTC_REGS]; + unsigned char extCRTCregs[GFX_EXT_CRTC_REGS]; +} gfx_vga_struct; + +/* POSSIBLE STATUS VALUES */ + +#define GFX_STATUS_UNSUPPORTED (-3) +#define GFX_STATUS_BAD_PARAMETER (-2) +#define GFX_STATUS_ERROR (-1) +#define GFX_STATUS_OK 0 + +/* CPU AND VIDEO TYPES */ + +#define GFX_CPU_GXLV 1 +#define GFX_CPU_SC1200 2 +#define GFX_CPU_REDCLOUD 3 +#define GFX_CPU_PYRAMID 0x20801 + + +#define GFX_VID_CS5530 1 +#define GFX_VID_SC1200 2 +#define GFX_VID_REDCLOUD 3 + +/* CHIP NAME AND REVISION */ + +typedef enum ChipType { + CHIP_NOT_DETECTED, + SC1200_REV_A, + SC1200_REV_B1_B2, + SC1200_REV_B3, + SC1200_REV_C1, + SC1200_REV_D1, + SC1200_REV_D1_1, + SC1200_REV_D2_MVD, /* Macrovision disabled */ + SC1200_REV_D2_MVE, /* Macrovision enabled */ + SC1200_FUTURE_REV +} ChipType; + +#endif /* !_gfx_type_h */ diff --git a/Source/DirectFB/gfxdrivers/nsc/include/nsc_galproto.h b/Source/DirectFB/gfxdrivers/nsc/include/nsc_galproto.h new file mode 100755 index 0000000..67266cc --- /dev/null +++ b/Source/DirectFB/gfxdrivers/nsc/include/nsc_galproto.h @@ -0,0 +1,1987 @@ +/* + * $Workfile: nsc_galproto.h $ + * $Revision: 1.3 $ + * + * File Contents: This file contains the main functions of the Geode + * frame buffer device drivers GAL function prototypes and + * data structures. + * + * Project: Geode Frame buffer device driver + * + */ + +/* NSC_LIC_ALTERNATIVE_PREAMBLE + * + * Revision 1.0 + * + * National Semiconductor Alternative GPL-BSD License + * + * National Semiconductor Corporation licenses this software + * ("Software"): + * + * National Xfree frame buffer driver + * + * under one of the two following licenses, depending on how the + * Software is received by the Licensee. + * + * If this Software is received as part of the Linux Framebuffer or + * other GPL licensed software, then the GPL license designated + * NSC_LIC_GPL applies to this Software; in all other circumstances + * then the BSD-style license designated NSC_LIC_BSD shall apply. + * + * END_NSC_LIC_ALTERNATIVE_PREAMBLE */ + +/* NSC_LIC_BSD + * + * National Semiconductor Corporation Open Source License for + * + * National Xfree frame buffer driver + * + * (BSD License with Export Notice) + * + * Copyright (c) 1999-2001 + * National Semiconductor Corporation. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * * Redistributions in binary form must reproduce the above + * copyright notice, this list of conditions and the following + * disclaimer in the documentation and/or other materials provided + * with the distribution. + * + * * Neither the name of the National Semiconductor Corporation nor + * the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior + * written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER + * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE, + * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF + * YOUR JURISDICTION. It is licensee's responsibility to comply with + * any export regulations applicable in licensee's jurisdiction. Under + * CURRENT (2001) U.S. export regulations this software + * is eligible for export from the U.S. and can be downloaded by or + * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed + * destinations which include Cuba, Iraq, Libya, North Korea, Iran, + * Syria, Sudan, Afghanistan and any other country to which the U.S. + * has embargoed goods and services. + * + * END_NSC_LIC_BSD */ + +/* NSC_LIC_GPL + * + * National Semiconductor Corporation Gnu General Public License for + * + * National Xfree frame buffer driver + * + * (GPL License with Export Notice) + * + * Copyright (c) 1999-2001 + * National Semiconductor Corporation. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted under the terms of the GNU General + * Public License as published by the Free Software Foundation; either + * version 2 of the License, or (at your option) any later version + * + * In addition to the terms of the GNU General Public License, neither + * the name of the National Semiconductor Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER + * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE, + * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. See the GNU General Public License for more details. + * + * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF + * YOUR JURISDICTION. It is licensee's responsibility to comply with + * any export regulations applicable in licensee's jurisdiction. Under + * CURRENT (2001) U.S. export regulations this software + * is eligible for export from the U.S. and can be downloaded by or + * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed + * destinations which include Cuba, Iraq, Libya, North Korea, Iran, + * Syria, Sudan, Afghanistan and any other country to which the U.S. + * has embargoed goods and services. + * + * You should have received a copy of the GNU General Public License + * along with this file; if not, write to the Free Software Foundation, + * Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + * END_NSC_LIC_GPL */ + +#ifndef __GALPROTO_SEP_20_2000 +#define __GALPROTO_SEP_20_2000 + +/* durango reg definitions and type's */ +#include <gfx_type.h> +#include <gfx_regs.h> + +/* Panel related definition */ +#include <pnl_defs.h> + +typedef int SWORD; +typedef unsigned int DWORD; +typedef unsigned short WORD; +typedef unsigned char CHAR; +typedef unsigned char BOOLEAN; +typedef unsigned int *PDWORD; + +/***************************************/ +/* Applications/User mode drivers use this ioctl to + * send a graphics device request to the frame buffer + * driver + */ +#define FBIOGAL_API 0x4700 + +/* + * Applications must sign the I/O packet with this value + */ + +#define FBGAL_SIGNATURE 0xC0C0BABE + +/* + * Version is a 16:16 fixed value + * Current version is 1.0000 + */ + +#define FBGAL_VERSION 0x10000 + +/* + * Definitions for Graphics Subfunctions + * + */ + +typedef enum GALFN_CODES +{ +/* General Adapter level functions */ + GALFN_GETADAPTERINFO = 0, + GALFN_SETSOFTVGASTATE, + GALFN_GETSOFTVGASTATE, + GALFN_WAITUNTILIDLE, + GALFN_WAITVERTICALBLANK, + GALFN_SETCRTENABLE, + GALFN_WRITEREG, + GALFN_READREG, + +/* Change/Get Display hardware state */ + + GALFN_ISDISPLAYMODESUPPORTED, + GALFN_SETDISPLAYMODE, + GALFN_GETDISPLAYMODE, + GALFN_SETBPP, + GALFN_SETDISPLAYBPP, + GALFN_GETDISPLAYBPP, + GALFN_SETDISPLAYPITCH, + GALFN_GETDISPLAYPITCH, + GALFN_SETDISPLAYOFFSET, + GALFN_GETDISPLAYOFFSET, + GALFN_DOTCLKTOREFRESH, + GALFN_GETDISPLAYTIMINGS, + GALFN_SETDISPLAYTIMINGS, + GALFN_SETPALETTE, + GALFN_GETPALETTE, + GALFN_SETPALETTE_ENTRY, + GALFN_GETPALETTE_ENTRY, + GALFN_SETFIXEDTIMINGS, + +/* Hardware cursor funtions */ + + GALFN_SETCURSORENABLE, + GALFN_GETCURSORENABLE, + GALFN_SETCURSORPOSITION, + GALFN_GETCURSORPOSITION, + GALFN_SETCURSORCOLORS, + GALFN_GETCURSORCOLORS, + GALFN_SETCURSORSHAPE, + GALFN_SETCURSORSHAPE_RCLD, + +/* grafix rendering funtions */ + GALFN_SETSOLIDPATTERN, + GALFN_SETRASTEROPERATION, + GALFN_SETSOLIDSOURCE, + GALFN_PATTERNFILL, + GALFN_SETMONOSOURCE, + GALFN_SETMONOPATTERN, + GALFN_SCREENTOSCREENBLT, + GALFN_SCREENTOSCREENXBLT, + GALFN_BRESENHAMLINE, + GALFN_COLOR_PATTERNFILL, + GALFN_COLOR_BITMAP_TO_SCREEN_BLT, + GALFN_COLOR_BITMAP_TO_SCREEN_XBLT, + GALFN_MONO_BITMAP_TO_SCREEN_BLT, + GALFN_TEXT_BLT, + +/* VGA Support functions */ + + GALFN_VGAMODESWITCH, + GALFN_VGACLEARCRTEXT, + GALFN_VGASETPITCH, + GALFN_VGARESTORE, + GALFN_VGASAVE, + GALFN_VGASETMODE, + +/* Compression functions */ + GALFN_SETCOMPRESSIONSTATE, + GALFN_GETCOMPRESSIONSTATE, + GALFN_SETCOMPRESSIONPARAMS, + GALFN_GETCOMPRESSIONPARAMS, + +/* Panel Support functions */ + + GALFN_PNLSETPARAMS, + GALFN_PNLGETPARAMS, + GALFN_PNLINITPANEL, + GALFN_PNLSAVESTATE, + GALFN_PNLRESTORESTATE, + GALFN_PNLPOWERUP, + GALFN_PNLPOWERDOWN, + GALFN_PNLBIOSENABLE, + GALFN_PNLBIOSINFO, + GALFN_ENABLEPANNING, + +/* TV Support functions */ + + GALFN_SETTVPARAMS, + GALFN_GETTVPARAMS, + GALFN_SETTVTIMING, + GALFN_GETTVTIMING, + GALFN_SETENABLE, + GALFN_GETENABLE, + GALFN_ISTVMODESUPPORTED, + +/* Video Support functions */ + + GALFN_SETVIDEOENABLE, + GALFN_SETVIDEOFORMAT, + GALFN_SETVIDEOSIZE, + GALFN_SETVIDEOOFFSET, + GALFN_SETVIDEOWINDOW, + GALFN_SETVIDEOSCALE, + GALFN_SETVIDEOFILTER, + GALFN_SETVIDEOCOLORKEY, + GALFN_SETVIDEODOWNSCALEENABLE, + GALFN_SETVIDEODOWNSCALECONFIG, + GALFN_SETVIDEODOWNSCALECOEFF, + GALFN_SETVIDEOSOURCE, + GALFN_SETVIDEOINTERLACED, + GALFN_SETVIDEOCURSOR, + GALFN_SETVIDEOREQUEST, + GALFN_SETALPHAENABLE, + GALFN_SETALPHAWINDOW, + GALFN_SETALPHAVALUE, + GALFN_SETALPHAPRIORITY, + GALFN_SETALPHACOLOR, + GALFN_SETALPHAREGION, + GALFN_SETVIDEOOUTSIDEALPHA, + GALFN_SETVIDEOPALETTE, + GALFN_GETVIDEOINFO, + GALFN_SETVIDEOCOLORSPACE, + +/* VIP Supported functions */ + + GALFN_SETVIPENABLE, + GALFN_SETVIPCAPTURERUNMODE, + GALFN_SETVIPBASE, + GALFN_SETVIPPITCH, + GALFN_SETVIPMODE, + GALFN_SETVIPBRTH, + GALFN_SETVIPLASTLINE, + GALFN_TESTVIPODDFIELD, + GALFN_TESTVIPBASESUPDATED, + GALFN_SETVBIENABLE, + GALFN_SETVBIMODE, + GALFN_SETVBIBASE, + GALFN_SETVBIPITCH, + GALFN_SETVBIDIRECT, + GALFN_SETVBIINTERRUPT, + GALFN_SETGENLOCKENABLE, + GALFN_SETTOPLINEINODD, + GALFN_SETGENLOCKDELAY, + GALFN_SETMACROVISIONENABLE, + + GALFN_GETVIPENABLE, + GALFN_GETVIPBASE, + GALFN_GETVIPPITCH, + GALFN_GETVIPMODE, + GALFN_GETVIPBRTH, + GALFN_GETVIPLINE, + GALFN_GETVBIENABLE, + GALFN_GETVBIBASE, + GALFN_GETVBIPITCH, + GALFN_GETVBIMODE, + GALFN_GETVBIDIRECT, + GALFN_GETVBIINTERRUPT, + GALFN_TESTVIPFIFOOVERFLOW, + +/* Second generation rendering routines */ + + GALFN_SETICONENABLE, + GALFN_SETICONCOLORS, + GALFN_SETICONPOSITION, + GALFN_SETICONSHAPE64, + + GALFN_SETSOURCESTRIDE, + GALFN_SETDESTINATIONSTRIDE, + GALFN_SETSOURCETRANSPARENCY, + GALFN_SETPATTERNORIGIN, + GALFN_GFX2SETALPHAMODE, + GALFN_GFX2SETALPHAVALUE, + GALFN_GFX2PATTERNFILL, + GALFN_GFX2COLORPATTERNFILL, + GALFN_GFX2SCREENTOSCREENBLT, + GALFN_GFX2MONOEXPANDBLT, + GALFN_GFX2COLORBMPTOSCRBLT, + GALFN_GFX2MONOBMPTOSCRBLT, + GALFN_GFX2TEXTBLT, + GALFN_GFX2BRESENHAMLINE, + GALFN_GFX2SYNCTOVBLANK, + +/* Change/Get Video routines */ + + GALFN_SETCOLORSPACEYUV, + GALFN_SETVIDEOYUVPITCH, + GALFN_SETVIDEOYUVOFFSETS, + GALFN_SETVIDEOLEFTCROP, + GALFN_SETVIDEOVERTICALDOWNSCALE, + GALFN_SETVBISOURCE, + GALFN_SETVBILINES, + GALFN_SETVBITOTAL, + GALFN_SETVSCALEROFFSET, + + GALFN_GETVBISOURCE, + GALFN_GETVBILINES, + GALFN_GETVBITOTAL, + GALFN_GETVSCALEROFFSET, + GALFN_GETVIDEOINTERLACED, + GALFN_GETCOLORSPACEYUV, + GALFN_GETGENLOCKENABLE, + GALFN_GETGENLOCKDELAY, + GALFN_GETVIDEOCURSOR, + GALFN_READCRC, + GALFN_READWINDOWCRC, + GALFN_GETMACROVISIONENABLE, + GALFN_GETALPHAENABLE, + GALFN_GETALPHASIZE, + GALFN_GETALPHAVALUE, + GALFN_GETALPHAPRIORITY, + GALFN_GETALPHACOLOR, + GALFN_GETVIDEOYUVPITCH, + GALFN_GETVIDEOYUVOFFSETS, + +/* Additional VGA Support functions */ + + GALFN_VGATESTPCI, + GALFN_VGAGETPCICOMMAND, + GALFN_VGASEQRESET, + GALFN_VGASETGRAPHICSBITS, + +/* This is last function supported. + * If you want to define ioctl function. + * You should define before this function. + * Update that the lastfunction supported to new value. + */ + GALFN_LASTFUNCTION_SUPPORTED +} +GALFN_CODES; + +/* end of GAL function list */ + +#define GAL_HEADER\ + DWORD dwSignature; /* Sign all structs with FBGAL_SIGNATURE */\ + DWORD dwSize; /* Size of struct for that subfunction */\ + DWORD dwVersion; /* Current version of the API */\ + DWORD dwSubfunction; /* GAL subfunction */\ + DWORD dwReturnValue; /* Return value from subfunction */ + +/* + * #define GALFN_PNLPOWERUP + * #define GALFN_PNLPOWERDOWN + */ +typedef struct __GAL_BASE +{ +GAL_HEADER} +GAL_BASE, *PGAL_BASE; + +/* + * #define GALFN_GETADAPTERINFO + */ +typedef struct __GAL_GETADAPTERINFO +{ + GAL_HEADER DWORD dwCPUVersion; + DWORD dwCPUType; + DWORD dwFrameBufferBase; + DWORD dwFrameBufferSize; + DWORD dwGfxRegisterBase; + DWORD dwGpsRegisterBase; + DWORD dwVidRegisterBase; + DWORD dwVipRegisterBase; + DWORD dwVideoVersion; + DWORD dwMaxSupportedPixelClock; + +} +GAL_ADAPTERINFO, *PGAL_ADAPTERINFO; + +#define GAL_SOFTVGASTATE_ENABLE 1 +#define GAL_SOFTVGASTATE_DISABLE 0 +/* + * #define GALFN_SOFTVGASTATE + */ +typedef struct __GAL_SOFTVGASTATE +{ + GAL_HEADER BOOLEAN bSoftVgaEnable; + +} +GAL_SOFTVGASTATE, *PGAL_SOFTVGASTATE; + +/* + * #define GALFN_WAITUNTILIDLE + */ +typedef struct __GAL_WAITUNTILIDLE +{ +GAL_HEADER} +GAL_WAITUNTILIDLE, *PGAL_WAITUNTILIDLE; + +/* + * #define GALFN_WAITVERTICALBLANK + */ +typedef struct __GAL_WAITVERTICALBLANK +{ +GAL_HEADER} +GAL_WAITVERTICALBLANK, *PGAL_WAITVERTICALBLANK; + +#define GAL_REG 0x1 +#define GAL_VID 0x2 +#define GAL_VIP 0x4 +/* + * #define GALFN_WRITEREG + * #define GALFN_READREG + */ +typedef struct __GAL_HWACCESS +{ + GAL_HEADER DWORD dwType; + DWORD dwOffset; + DWORD dwValue; + DWORD dwByteCount; + +} +GAL_HWACCESS, *PGAL_HWACCESS; + +/* + * #define GALFN_ISDISPLAYMODESUPPORTED + * #define GALFN_SETDISPLAYMODE + * #define GALFN_GETDISPLAYMODE + */ +typedef struct __GAL_DISPLAYMODE +{ + GAL_HEADER WORD wXres; + WORD wYres; + WORD wBpp; + WORD wRefresh; + DWORD dwSupported; + +} +GAL_DISPLAYMODE, *PGAL_DISPLAYMODE; + +/* + * #define GALFN_SETBPP + * #define GALFN_GETBPP + * #define GALFN_SETPITCH + * #define GALFN_GETPITCH + * #define GALFN_SETOFFSET + * #define GALFN_GETOFFSET + */ +typedef struct __GAL_DISPLAYPARAMS +{ + GAL_HEADER DWORD dwOffset; + WORD wBpp; + WORD wPitch; + +} +GAL_DISPLAYPARAMS, *PGAL_DISPLAYPARAMS; + +/* + * #define GALFN_DOTCLKTOREFRESH + */ +typedef struct __GAL_DOTCLKTOREFRESH +{ + GAL_HEADER DWORD dwDotClock; + WORD wXres; + WORD wYres; + WORD wBpp; + WORD wRefreshRate; + +} +GAL_DOTCLKTOREFRESH, *PGAL_DOTCLKTOREFRESH; + +/* + * #define GALFN_GETDISPLAYTIMINGS + * #define GALFN_SETDISPLAYTIMINGS + */ +typedef struct __GAL_DISPLAYTIMING +{ + GAL_HEADER DWORD dwDotClock; + WORD wPitch; + WORD wBpp; + WORD wHTotal; + WORD wHActive; + WORD wHSyncStart; + WORD wHSyncEnd; + WORD wHBlankStart; + WORD wHBlankEnd; + WORD wVTotal; + WORD wVActive; + WORD wVSyncStart; + WORD wVSyncEnd; + WORD wVBlankStart; + WORD wVBlankEnd; + WORD wPolarity; + +} +GAL_DISPLAYTIMING, *PGAL_DISPLAYTIMING; + +/* + * #define GALFN_SETPALETTE_ENTRY + * #define GALFN_GETPALETTE_ENTRY + */ +typedef struct __GAL_PALETTE_ENTRY +{ + GAL_HEADER DWORD dwIndex; + DWORD dwPalette; +} +GAL_PALETTE_ENTRY, *PGAL_PALETTE_ENTRY; + +/* + * #define GALFN_SETPALETTE + * #define GALFN_GETPALETTE + */ +typedef struct __GAL_PALETTE +{ + GAL_HEADER DWORD dwColors[256]; +} +GAL_PALETTE, *PGAL_PALETTE; + +/* + * #define GALFN_COMPRESSIONSTATE + */ +typedef struct __GAL_COMPRESSIONSTATE +{ + GAL_HEADER BOOLEAN bCompressionState; +} +GAL_COMPRESSIONSTATE, *PGAL_COMPRESSIONSTATE; + +#define GAL_COMPRESSION_ENABLE 1 +#define GAL_COMPRESSION_DISABLE 0 + +#define GAL_COMPRESSION_OFFSET 1 +#define GAL_COMPRESSION_PITCH 2 +#define GAL_COMPRESSION_SIZE 4 +#define GAL_COMPRESSION_ALL 7 + +/* + * #define GALFN_COMPRESSIONPARAMS + */ +typedef struct __GAL_COMPRESSIONPARAMS +{ + GAL_HEADER DWORD dwFlags; + DWORD dwCompOffset; + WORD dwCompPitch; + WORD dwCompSize; +} +GAL_COMPRESSIONPARAMS, *PGAL_COMPRESSIONPARAMS; + +#define GAL_SETCURSORENABLE_ENABLE 1 +#define GAL_SETCURSORENABLE_DISABLE 0 +/* + * #define GALFN_CURSORENABLE + */ +typedef struct __GAL_CURSORENABLE +{ + GAL_HEADER BOOLEAN bCursorEnable; +} +GAL_CURSORENABLE, *PGAL_CURSORENABLE; + +/* + * #define GALFN_CURSORPOSITION + */ +typedef struct __GAL_CURSORPOSITION +{ + GAL_HEADER DWORD dwMemOffset; + WORD wXPos; + WORD wYPos; + WORD wXHot; + WORD wYHot; +} +GAL_CURSORPOSITION, *PGAL_CURSORPOSITION; + +/* + * #define GALFN_SETCURSORSHAPE + */ +typedef struct __GAL_SETCURSORSHAPE +{ + GAL_HEADER DWORD dwMemOffset; + DWORD dwAndMask[32]; /* Most gfx hardware support only 32x32 */ + DWORD dwXorMask[32]; +} +GAL_SETCURSORSHAPE, *PGAL_SETCURSORSHAPE; + +/* + * #define GALFN_SETCURSORCOLORS + */ +typedef struct __GAL_CURSORCOLORS +{ + GAL_HEADER DWORD dwBgColor; + DWORD dwFgColor; +} +GAL_CURSORCOLORS, *PGAL_CURSORCOLORS; + +/* + * #define GALFN_SETSOLIDPATTERN + */ +typedef struct __GAL_SETSOLIDPATTERN +{ + GAL_HEADER DWORD dwColor; +} +GAL_SETSOLIDPATTERN, *PGAL_SETSOLIDPATTERN; + +/* + * #define GALFN_SETRASTEROPERATION + */ +typedef struct __GAL_SETRASTEROPERATION +{ + GAL_HEADER CHAR cRop; +} +GAL_RASTEROPERATION, *PGAL_RASTEROPERATION; + +/* + * #define GALFN_SETSOLIDSOURCE + */ +typedef struct __GAL_SETSOLIDSOURCE +{ + GAL_HEADER DWORD dwColor; +} +GAL_SETSOLIDSOURCE, *PGAL_SETSOLIDSOURCE; + +/* + * #define GALFN_PATTERNFILL + */ +typedef struct __GAL_PATTERNFILL +{ + GAL_HEADER WORD wXPos; + WORD wYPos; + WORD wWidth; + WORD wHeight; +} +GAL_PATTERNFILL, *PGAL_PATTERNFILL; + +/* + * #define GALFN_SETMONOSOURCE + */ +typedef struct __GAL_SETMONOSOURCE +{ + GAL_HEADER DWORD dwBgColor; + DWORD dwFgColor; + CHAR cTransparency; +} +GAL_SETMONOSOURCE, *PGAL_SETMONOSOURCE; + +/* + * #define GALFN_SETMONOPATTERN + */ +typedef struct __GAL_SETMONOPATTERN +{ + GAL_HEADER DWORD dwBgColor; + DWORD dwFgColor; + DWORD dwData0; + DWORD dwData1; + CHAR cTransparency; +} +GAL_SETMONOPATTERN, *PGAL_SETMONOPATTERN; + +/* + * #define GALFN_SCREENTOSCREENBLT + */ +typedef struct __GAL_SCREENTOSCREENBLT +{ + GAL_HEADER WORD wXStart; + WORD wYStart; + WORD wXEnd; + WORD wYEnd; + WORD wWidth; + WORD wHeight; +} +GAL_SCREENTOSCREENBLT, *PGAL_SCREENTOSCREENBLT; + +/* + * #define GALFN_SCREENTOSCREENXBLT + */ +typedef struct __GAL_SCREENTOSCREENXBLT +{ + GAL_HEADER WORD wXStart; + WORD wYStart; + WORD wXEnd; + WORD wYEnd; + WORD wWidth; + WORD wHeight; + DWORD dwColor; +} +GAL_SCREENTOSCREENXBLT, *PGAL_SCREENTOSCREENXBLT; + +/* + * #define GALFN_BRESENHAMLINE + */ +typedef struct __GAL_BRESENHAMLINE +{ + GAL_HEADER WORD wX1; + WORD wY1; + WORD wLength; + WORD wErr; + WORD wE1; + WORD wE2; + WORD wFlags; +} +GAL_BRESENHAMLINE, *PGAL_BRESENHAMLINE; + +/* + * #define GALFN_COLOR_PATTERNFILL + */ +typedef struct __GAL_COLOR_PATTERNFILL +{ + GAL_HEADER WORD wDsty; + WORD wDstx; + WORD wWidth; + WORD wHeight; + DWORD dwPattern; +} +GAL_COLOR_PATTERNFILL, *PGAL_COLOR_PATTERNFILL; + +/* + * #define GALFN_COLOR_BITMAP_TO_SCREEN_BLT + */ +typedef struct __GAL_COLOR_BITMAP_TO_SCREEN_BLT +{ + GAL_HEADER WORD wSrcx; + WORD wSrcy; + WORD wDstx; + WORD wDsty; + WORD wWidth; + WORD wHeight; + DWORD dwData; + WORD wPitch; +} +GAL_COLOR_BITMAP_TO_SCREEN_BLT, *PGAL_COLOR_BITMAP_TO_SCREEN_BLT; + +/* + * #define GALFN_COLOR_BITMAP_TO_SCREEN_XBLT + */ +typedef struct __GAL_COLOR_BITMAP_TO_SCREEN_XBLT +{ + GAL_HEADER WORD wSrcx; + WORD wSrcy; + WORD wDstx; + WORD wDsty; + WORD wWidth; + WORD wHeight; + DWORD dwData; + WORD wPitch; + DWORD dwColor; +} +GAL_COLOR_BITMAP_TO_SCREEN_XBLT, *PGAL_COLOR_BITMAP_TO_SCREEN_XBLT; + +/* + * #define GALFN_MONO_BITMAP_TO_SCREEN_BLT + */ +typedef struct __GAL_MONO_BITMAP_TO_SCREEN_BLT +{ + GAL_HEADER WORD wSrcx; + WORD wSrcy; + WORD wDstx; + WORD wDsty; + WORD wWidth; + WORD wHeight; + DWORD dwData; + WORD wPitch; +} +GAL_MONO_BITMAP_TO_SCREEN_BLT, *PGAL_MONO_BITMAP_TO_SCREEN_BLT; + +/* + * #define GALFN_TEXT_BLT + */ +typedef struct __GAL_TEXT_BLT +{ + GAL_HEADER WORD wDstx; + WORD wDsty; + WORD wWidth; + WORD wHeight; + DWORD dwData; +} +GAL_TEXT_BLT, *PGAL_TEXT_BLT; + + /* + * * #define GALFN_VGAMODESWITCH + * * #define GALFN_VGACLEARCRTEXT + * * #define GALFN_VGASETPITCH + * * #define GALFN_VGARESTORE + * * #define GALFN_VGASAVE + * * #define GALFN_VGASETMODE + */ + +typedef struct __GAL_VGAREGS +{ + int xsize; + int ysize; + int hz; + int clock; + unsigned char miscOutput; + unsigned char stdCRTCregs[GFX_STD_CRTC_REGS]; + unsigned char extCRTCregs[GFX_EXT_CRTC_REGS]; +} +GAL_VGAREGS, *PGAL_VGAREGS; + +typedef struct __GAL_VGAMODEDATA +{ + GAL_HEADER DWORD dwFlags; /* Flags for this subfunction */ + GAL_VGAREGS sVgaRegs; /* CRT+SEQ+SEQ register data block */ + WORD wXres; + WORD wYres; + WORD wBpp; + WORD wRefresh; +} +GAL_VGAMODEDATA, *PGAL_VGAMODEDATA; + +typedef struct __GAL_VGATESTPCI +{ + GAL_HEADER SWORD softvga; +} +GAL_VGATESTPCI, *PGAL_VGATESTPCI; + +typedef struct __GAL_VGAGETPCICOMMAND +{ + GAL_HEADER unsigned char value; +} +GAL_VGAGETPCICOMMAND, *PGAL_VGAGETPCICOMMAND; + +typedef struct __GAL_VGASEQRESET +{ + GAL_HEADER SWORD reset; + SWORD statusok; +} +GAL_VGASEQRESET, *PGAL_VGASEQRESET; + +typedef struct __GAL_VGASETGRAPHICSBITS +{ + GAL_HEADER SWORD statusok; +} +GAL_VGASETGRAPHICSBITS, *PGAL_VGASETGRAPHICSBITS; + +/******** Panel Support functions *********************/ +/* +* #define GALFN_PNLSETPARAMS +* #define GALFN_PNLGETPARAMS +* #define GALFN_PNLINITPANEL +* #define GALFN_PNLSAVESTATE +* #define GALFN_PNLRESTORESTATE +*/ +typedef struct __GAL_PNLPARAMS +{ + GAL_HEADER Pnl_PanelParams PanelParams; +} +GAL_PNLPARAMS, *PGAL_PNLPARAMS; + +/* +* #define GALFN_PNLBIOSENABLE +* #define GALFN_PNLBIOSINFO +*/ +typedef struct __GAL_PNLBIOS +{ + GAL_HEADER int state; + int XRes; + int YRes; + int Bpp; + int Freq; +} +GAL_PNLBIOS, *PGAL_PNLBIOS; + +typedef struct __GAL_ENABLEPANNING +{ + GAL_HEADER int x; + int y; +} +GAL_ENABLEPANNING, *PGAL_ENABLEPANNING; + +/* + * #define GALFN_SETCRTENABLE + * #define GALFN_GETCRTENABLE + */ +typedef struct __GAL_CRTENABLE +{ + GAL_HEADER WORD wCrtEnable; +} +GAL_CRTENABLE, *PGAL_CRTENABLE; + +#define GAL_TVSTATE 0x01 +#define GAL_TVOUTPUT 0x02 +#define GAL_TVFORMAT 0x04 +#define GAL_TVRESOLUTION 0x08 +#define GAL_TVALL 0x0F +/* + * #define GALFN_SETTVPARAMS + * #define GALFN_GETTVPARAMS + * #define GALFN_SETENABLE + * #define GALFN_GETENABLE + * #define GALFN_ISTVMODESUPPORTED + */ +typedef struct __GAL_TVPARAMS +{ + GAL_HEADER DWORD dwFlags; + WORD wWidth; + WORD wHeight; + WORD wStandard; + WORD wType; + WORD wOutput; + WORD wResolution; + BOOLEAN bState; + +} +GAL_TVPARAMS, *PGAL_TVPARAMS; + +/* + * #define GALFN_SETTVTIMING + * #define GALFN_GETTVTIMING + */ +typedef struct __GAL_TVTIMING +{ + GAL_HEADER DWORD dwFlags; /* not used currently */ + unsigned long HorzTim; + unsigned long HorzSync; + unsigned long VertSync; + unsigned long LineEnd; + unsigned long VertDownscale; + unsigned long HorzScaling; + unsigned long TimCtrl1; + unsigned long TimCtrl2; + unsigned long Subfreq; + unsigned long DispPos; + unsigned long DispSize; + unsigned long Debug; + unsigned long DacCtrl; + unsigned long DotClock; +} +GAL_TVTIMING, *PGAL_TVTIMING; + +/******** Video Support functions *********************/ + +typedef struct __GAL_SETVIDEOENABLE +{ + GAL_HEADER BOOLEAN enable; +} +GAL_VIDEOENABLE, *PGAL_VIDEOENABLE; + +typedef struct __GAL_SETVIDEOFORMAT +{ + GAL_HEADER int format; +} +GAL_VIDEOFORMAT, *PGAL_VIDEOFORMAT; + +typedef struct __GAL_SETVIDEOSIZE +{ + GAL_HEADER unsigned short width; + unsigned short height; +} +GAL_VIDEOSIZE, *PGAL_VIDEOSIZE; + +typedef struct __GAL_SETVIDEOOFFSET +{ + GAL_HEADER unsigned long offset; +} +GAL_VIDEOOFFSET, *PGAL_VIDEOOFFSET; + +typedef struct __GAL_SETVIDEOWINDOW +{ + GAL_HEADER short x; + short y; + short w; + short h; +} +GAL_VIDEOWINDOW, *PGAL_VIDEOWINDOW; + +typedef struct __GAL_SETVIDEOSCALE +{ + GAL_HEADER unsigned short srcw; + unsigned short srch; + unsigned short dstw; + unsigned short dsth; +} +GAL_VIDEOSCALE, *PGAL_VIDEOSCALE; + +typedef struct __GAL_SETVIDEOFILTER +{ + GAL_HEADER int xfilter; + int yfilter; +} +GAL_VIDEOFILTER, *PGAL_VIDEOFILTER; + +typedef struct __GAL_SETVIDEOCOLORKEY +{ + GAL_HEADER unsigned long key; + unsigned long mask; + int bluescreen; +} +GAL_VIDEOCOLORKEY, *PGAL_VIDEOCOLORKEY; + +typedef struct __GAL_SETVIDEODOWNSCALEENABLE +{ + GAL_HEADER int enable; +} +GAL_VIDEODOWNSCALEENABLE, *PGAL_VIDEODOWNSCALEENABLE; + +typedef struct __GAL_SETVIDEODOWNSCALECONFIG +{ + GAL_HEADER unsigned short type; + unsigned short m; +} +GAL_VIDEODOWNSCALECONFIG, *PGAL_VIDEODOWNSCALECONFIG; + +typedef struct __GAL_SETVIDEODOWNSCALECOEFF +{ + GAL_HEADER unsigned short coef1; + unsigned short coef2; + unsigned short coef3; + unsigned short coef4; +} +GAL_VIDEODOWNSCALECOEFF, *PGAL_VIDEODOWNSCALECOEFF; + +#define GAL_VIDEO_SOURCE_MEMORY 0x0 +#define GAL_VIDEO_SOURCE_DVIP 0x1 +typedef struct __GAL_SETVIDEOSOURCE +{ + GAL_HEADER int source; +} +GAL_VIDEOSOURCE, *PGAL_VIDEOSOURCE; + +typedef struct __GAL_SETVIDEOINTERLACED +{ + GAL_HEADER int enable; +} +GAL_SETVIDEOINTERLACED, *PGAL_SETVIDEOINTERLACED; + +typedef struct __GAL_GETVIDEOINTERLACED +{ + GAL_HEADER int interlaced; +} +GAL_GETVIDEOINTERLACED, *PGAL_GETVIDEOINTERLACED; + +typedef struct __GAL_COLORSPACEYUV +{ + GAL_HEADER int colorspace; +} +GAL_COLORSPACEYUV, *PGAL_COLORSPACEYUV; + +typedef struct __GAL_SETGENLOCKENABLE +{ + GAL_HEADER int enable; +} +GAL_GENLOCKENABLE, *PGAL_GENLOCKENABLE; + +typedef struct __GAL_SETGENLOCKDELAY +{ + GAL_HEADER int delay; +} +GAL_GENLOCKDELAY, *PGAL_GENLOCKDELAY; + +typedef struct __GAL_SETTOPLINEINODD +{ + GAL_HEADER int enable; +} +GAL_TOPLINEINODD, *PGAL_TOPLINEINODD; + +typedef struct __GAL_SETVIDEOCURSOR +{ + GAL_HEADER unsigned long key; + unsigned long mask; + unsigned short select_color2; + unsigned long color1; + unsigned long color2; +} +GAL_VIDEOCURSOR, *PGAL_VIDEOCURSOR; + +typedef struct __GAL_READCRC +{ + GAL_HEADER DWORD crc; +} +GAL_READCRC, *PGAL_READCRC; + +typedef struct __GAL_READWINDOWCRC +{ + GAL_HEADER SWORD source; + WORD x; + WORD y; + WORD width; + WORD height; + SWORD crc32; + DWORD crc; +} +GAL_READWINDOWCRC, *PGAL_READWINDOWCRC; + +typedef struct __GAL_GETALPHASIZE +{ + GAL_HEADER WORD * x; + WORD *y; + WORD *width; + WORD *height; +} +GAL_ALPHASIZE, *PGAL_ALPHASIZE; + +typedef struct __GAL_SETMACROVISIONENABLE +{ + GAL_HEADER SWORD enable; +} +GAL_MACROVISIONENABLE, *PGAL_MACROVISIONENABLE; + +typedef struct __GAL_SETVIDEOREQUEST +{ + GAL_HEADER short x; + short y; +} +GAL_VIDEOREQUEST, *PGAL_VIDEOREQUEST; + +typedef struct __GAL_ALPHAENABLE +{ + GAL_HEADER int enable; +} +GAL_ALPHAENABLE, *PGAL_ALPHAENABLE; + +typedef struct __GAL_SETALPHAWINDOW +{ + GAL_HEADER short x; + short y; + unsigned short width; + unsigned short height; +} +GAL_ALPHAWINDOW, *PGAL_ALPHAWINDOW; + +typedef struct __GAL_ALPHAVALUE +{ + GAL_HEADER unsigned char alpha; + char delta; +} +GAL_ALPHAVALUE, *PGAL_ALPHAVALUE; + +typedef struct __GAL_ALPHAPRIORITY +{ + GAL_HEADER int priority; +} +GAL_ALPHAPRIORITY, *PGAL_ALPHAPRIORITY; + +typedef struct __GAL_ALPHACOLOR +{ + GAL_HEADER unsigned long color; +} +GAL_ALPHACOLOR, *PGAL_ALPHACOLOR; + +typedef struct __GAL_SETALPHAREGION +{ + GAL_HEADER int region; +} +GAL_ALPHAREGION, *PGAL_ALPHAREGION; + +typedef struct __GAL_SETVIDEOOUTSIDEALPHA +{ + GAL_HEADER int enable; +} +GAL_VIDEOOUTSIDEALPHA, *PGAL_VIDEOOUTSIDEALPHA; + +typedef struct __GAL_SETVIDEOPALETTE +{ + GAL_HEADER int identity; + unsigned long palette[256]; +} +GAL_VIDEOPALETTE, *PGAL_VIDEOPALETTE; + +typedef struct __GAL_VIDEOINFO +{ + GAL_HEADER int enable; + int format; + int filter; + + unsigned long src_size; + unsigned long dst_size; + unsigned long line_size; + unsigned long xclip; + unsigned long offset; + unsigned long scale; + unsigned long position; + + int color_key_src; + unsigned long color_key; + unsigned long color_key_mask; + + int downscale_enable; + + unsigned short downscale_type; + + unsigned short downscale_mask; + unsigned short downscale_coef1; + unsigned short downscale_coef2; + unsigned short downscale_coef3; + unsigned short downscale_coef4; +} +GAL_VIDEOINFO, *PGAL_VIDEOINFO; + +/* ICON related data strucures */ +typedef struct __GAL_SETICONENABLE +{ + GAL_HEADER SWORD enable; +} +GAL_ICONENABLE, *PGAL_ICONENABLE; + +typedef struct __GAL_SETICONCOLORS +{ + GAL_HEADER DWORD color0; + DWORD color1; + DWORD color2; +} +GAL_ICONCOLORS, *PGAL_ICONCOLORS; + +typedef struct __GAL_SETICONPOSITION +{ + GAL_HEADER DWORD memoffset; + WORD xpos; +} +GAL_ICONPOSITION, *PGAL_ICONPOSITION; + +typedef struct __GAL_SETICONSHAPE64 +{ + GAL_HEADER DWORD memoffset; + DWORD *andmask; + DWORD *xormask; + DWORD lines; +} +GAL_ICONSHAPE64, *PGAL_ICONSHAPE64; + +/* VIP related data strucures */ + +typedef struct __GAL_SETVIPENABLE +{ + GAL_HEADER SWORD enable; +} +GAL_VIPENABLE, *PGAL_VIPENABLE; + +typedef struct __GAL_SETVIPCAPTURERUNMODE +{ + GAL_HEADER SWORD mode; +} +GAL_VIPCAPTURERUNMODE, *PGAL_VIPCAPTURERUNMODE; + +typedef struct __GAL_SETVIPBASE +{ + GAL_HEADER DWORD even; + DWORD odd; + DWORD address; +} +GAL_VIPBASE, *PGAL_VIPBASE; + +typedef struct __GAL_SETVIPPITCH +{ + GAL_HEADER DWORD pitch; +} +GAL_VIPPITCH, *PGAL_VIPPITCH; + +typedef struct __GAL_SETVIPMODE +{ + GAL_HEADER SWORD mode; +} +GAL_VIPMODE, *PGAL_VIPMODE; + +typedef struct __GAL_SETVIPBUS_RTH +{ + GAL_HEADER SWORD enable; +} +GAL_VIPBUS_RTH, *PGAL_VIPBUS_RTH; + +typedef struct __GAL_SETVIPLASTLINE +{ + GAL_HEADER SWORD last_line; +} +GAL_VIPLASTLINE, *PGAL_VIPLASTLINE; + +typedef struct __GAL_TESTVIPODDFIELD +{ + GAL_HEADER SWORD status; +} +GAL_TESTVIPODDFIELD, *PGAL_TESTVIPODDFIELD; + +typedef struct __GAL_TESTVIPBASESUPDATED +{ + GAL_HEADER SWORD status; +} +GAL_TESTVIPBASESUPDATED, *PGAL_TESTVIPBASESUPDATED; + +typedef struct __GAL_TESTVIPFIFOOVERFLOW +{ + GAL_HEADER SWORD status; +} +GAL_TESTVIPOVERFLOW, *PGAL_TESTVIPOVERFLOW; + +typedef struct __GAL_GETVIPLINE +{ + GAL_HEADER SWORD status; +} +GAL_VIPLINE, *PGAL_VIPLINE; + +/* VBI related data strucures */ + +typedef struct __GAL_VBIENABLE +{ + GAL_HEADER SWORD enable; +} +GAL_VBIENABLE, *PGAL_VBIENABLE; + +typedef struct __GAL_VBIBASE +{ + GAL_HEADER DWORD even; + DWORD odd; + DWORD address; +} +GAL_VBIBASE, *PGAL_VBIBASE; + +typedef struct __GAL_VBIPITCH +{ + GAL_HEADER DWORD pitch; +} +GAL_VBIPITCH, *PGAL_VBIPITCH; + +typedef struct __GAL_VBIMODE +{ + GAL_HEADER SWORD mode; +} +GAL_VBIMODE, *PGAL_VBIMODE; + +typedef struct __GAL_SETVBIDIRECT +{ + GAL_HEADER DWORD even_lines; + DWORD odd_lines; +} +GAL_SETVBIDIRECT, *PGAL_SETVBIDIRECT; + +typedef struct __GAL_GETVBIDIRECT +{ + GAL_HEADER SWORD odd; + DWORD direct_lines; +} +GAL_GETVBIDIRECT, *PGAL_GETVBIDIRECT; + +typedef struct __GAL_VBIINTERRUPT +{ + GAL_HEADER SWORD enable; +} +GAL_VBIINTERRUPT, *PGAL_VBIINTERRUPT; + +/* Second generation rendering routines data structures */ + +typedef struct __GAL_SETSTRIDE +{ + GAL_HEADER WORD stride; +} +GAL_STRIDE, *PGAL_STRIDE; + +typedef struct __GAL_SETPATTERNORIGIN +{ + GAL_HEADER int x; + int y; +} +GAL_PATTERNORIGIN, *PGAL_PATTERNORIGIN; + +typedef struct __GAL_SETSOURCETRANSPARENCY +{ + GAL_HEADER DWORD color; + DWORD mask; +} +GAL_SOURCETRANSPARENCY, *PGAL_SOURCETRANSPARENCY; + +typedef struct __GAL_GFX2SETALPHAMODE +{ + GAL_HEADER SWORD mode; +} +GAL_GFX2ALPHAMODE, *PGAL_GFX2ALPHAMODE; + +typedef struct __GAL_GFX2SETALPHAVALUE +{ + GAL_HEADER CHAR value; +} +GAL_GFX2ALPHAVALUE, *PGAL_GFX2ALPHAVALUE; + +typedef struct __GAL_GFX2PATTERNFILL +{ + GAL_HEADER DWORD dstoffset; + WORD width; + WORD height; +} +GAL_GFX2PATTERNFILL, *PGAL_GFX2PATTERNFILL; + +typedef struct __GAL_GFX2COLORPATTERNFILL +{ + GAL_HEADER DWORD dstoffset; + WORD width; + WORD height; + DWORD pattern; +} +GAL_GFX2COLORPATTERNFILL, *PGAL_GFX2COLORPATTERNFILL; + +typedef struct __GAL_GFX2SCREENTOSCREENBLT +{ + GAL_HEADER DWORD srcoffset; + DWORD dstoffset; + WORD width; + WORD height; + SWORD flags; +} +GAL_GFX2SCREENTOSCREENBLT, *PGAL_GFX2SCREENTOSCREENBLT; + +typedef struct __GAL_GFX2MONOEXPANDBLT +{ + GAL_HEADER unsigned long srcbase; + WORD srcx; + WORD srcy; + DWORD dstoffset; + WORD width; + WORD height; + WORD byte_packed; +} +GAL_GFX2MONOEXPANDBLT, *PGAL_GFX2MONOEXPANDBLT; + +typedef struct __GAL_GFX2COLORBMPTOSCRBLT +{ + GAL_HEADER WORD srcx; + WORD srcy; + DWORD dstoffset; + WORD width; + WORD height; + DWORD data; + WORD pitch; +} +GAL_GFX2COLORBMPTOSCRBLT, *PGAL_GFX2COLORBMPTOSCRBLT; + +typedef struct __GAL_GFX2MONOBMPTOSCRBLT +{ + GAL_HEADER WORD srcbase; + WORD srcx; + WORD srcy; + DWORD dstoffset; + WORD width; + WORD height; + DWORD data; + WORD pitch; +} +GAL_GFX2MONOBMPTOSCRBLT, *PGAL_GFX2MONOBMPTOSCRBLT; + +typedef struct __GAL_GFX2TEXTBLT +{ + GAL_HEADER DWORD dstoffset; + WORD width; + WORD height; + DWORD data; +} +GAL_GFX2TEXTBLT, *PGAL_GFX2TEXTBLT; + +typedef struct __GAL_GFX2BRESENHAMLINE +{ + GAL_HEADER DWORD dstoffset; + WORD length; + WORD initerr; + WORD axialerr; + WORD diagerr; + WORD flags; +} +GAL_GFX2BRESENHAMLINE, *PGAL_GFX2BRESENHAMLINE; + +typedef struct __GAL_GFX2SYNCTOVBLANK +{ +GAL_HEADER} +GAL_GFX2SYNCTOVBLANK, *PGAL_GFX2SYNCTOVBLANK; + +/* + GALFN_SETVIDEOYUVPITCH + */ +typedef struct _GAL_SETVIDEOYUVPITCH +{ + GAL_HEADER unsigned long y_pitch; + unsigned long uv_pitch; +} +GAL_VIDEOYUVPITCH, *PGAL_VIDEOYUVPITCH; + +/* + GALFN_SETVIDEOYUVOFFSETS +*/ +typedef struct _GAL_VIDEOYUVOFFSETS +{ + GAL_HEADER unsigned long dwYoffset; + unsigned long dwUoffset; + unsigned long dwVoffset; +} +GAL_VIDEOYUVOFFSETS, *PGAL_VIDEOYUVOFFSETS; + +typedef struct __GAL_SETVIDEOLEFTCROP +{ + GAL_HEADER WORD x; + SWORD status; +} +GAL_VIDEOLEFTCROP, *PGAL_VIDEOLEFTCROP; + +typedef struct __GAL_SETVIDEOVERTICALDOWNSCALE +{ + GAL_HEADER WORD srch; + WORD dsth; + SWORD status; +} +GAL_VIDEOVERTICALDOWNSCALE, *PGAL_VIDEOVERTICALDOWNSCALE; + +typedef struct __GAL_VBISOURCE +{ + GAL_HEADER VideoSourceType source; + SWORD status; +} +GAL_VBISOURCE, *PGAL_VBISOURCE; + +typedef struct __GAL_VBILINES +{ + GAL_HEADER DWORD even; + DWORD odd; + SWORD status; + DWORD lines; +} +GAL_VBILINES, *PGAL_VBILINES; + +typedef struct __GAL_VBITOTAL +{ + GAL_HEADER DWORD even; + DWORD odd; + SWORD status; + DWORD total; +} +GAL_VBITOTAL, *PGAL_VBITOTAL; + +typedef struct __GAL_VSCALEROFFSET +{ + GAL_HEADER char offset; + SWORD status; +} +GAL_VSCALEROFFSET, *PGAL_VSCALEROFFSET; + +/* MSR data strucures */ + +typedef struct __GAL_IDMSRDEVICE +{ + GAL_HEADER MSR * pDev; + DWORD address; + DEV_STATUS dev_status; +} +GAL_IDMSRDEVICE, *PGAL_IDMSRDEVICE; + +typedef struct __GAL_GETMSRDEVADDRESS +{ + GAL_HEADER WORD device; + unsigned long address; + DEV_STATUS dev_status; +} +GAL_GETMSRDEVADDRESS, *PGAL_GETMSRDEVADDRESS; + +typedef struct __GAL_GETMBUSIDATADDRESS +{ + GAL_HEADER unsigned int device; + unsigned long address; + DEV_STATUS dev_status; +} +GAL_GETMBUSIDATADDRESS, *PGAL_GETMBUSIDATADDRESS; + +/* Gal device function's prototye declarations */ + +/** Init **********************************************************/ +BOOLEAN Gal_initialize_interface(void); +BOOLEAN Gal_cleanup_interface(void); +BOOLEAN Gal_get_adapter_info(PGAL_ADAPTERINFO pAdapterInfo); +BOOLEAN Gal_set_softvga_state(BOOLEAN); +BOOLEAN Gal_get_softvga_state(int *bState); +BOOLEAN Gal_set_crt_enable(int); +BOOLEAN Gal_wait_until_idle(void); +BOOLEAN Gal_wait_vertical_blank(void); +BOOLEAN Gal_write_register(int type, unsigned long offset, + unsigned long value, int size); + +BOOLEAN Gal_read_register(int type, unsigned long offset, + unsigned long *value, int size); +/** Display Engine ******************************************************/ +BOOLEAN Gal_is_display_mode_supported(int xres, int yres, int bpp, int hz, + int *supported); +BOOLEAN Gal_set_display_mode(int xres, int yres, int bpp, int hz); +BOOLEAN Gal_get_display_mode(int *xres, int *yres, int *bpp, int *hz); +BOOLEAN Gal_set_bpp(unsigned short bpp); +BOOLEAN Gal_set_display_bpp(unsigned short bpp); +BOOLEAN Gal_get_display_bpp(unsigned short *bpp); +BOOLEAN Gal_set_display_pitch(unsigned short pitch); +BOOLEAN Gal_get_display_pitch(unsigned short *pitch); +BOOLEAN Gal_set_display_offset(unsigned long offset); +BOOLEAN Gal_get_display_offset(unsigned long *offset); +BOOLEAN Gal_get_refreshrate_from_dotclock(int xres, int yres, int bpp, + int *hz, unsigned long frequency); +BOOLEAN Gal_get_display_timing(PGAL_DISPLAYTIMING pDisplayTiming); +BOOLEAN Gal_set_display_timing(PGAL_DISPLAYTIMING pDisplayTiming); +BOOLEAN Gal_set_fixed_timings(int pnlXres, int pnlYres, int totXres, + int totYres, int bpp); +BOOLEAN Gal_set_display_palette_entry(unsigned long index, + unsigned long palette); +BOOLEAN Gal_get_display_palette_entry(unsigned long index, + unsigned long *palette); +BOOLEAN Gal_set_display_palette(PGAL_PALETTE); +BOOLEAN Gal_get_display_palette(PGAL_PALETTE); +BOOLEAN Gal_set_cursor_enable(int enable); +BOOLEAN Gal_get_cursor_enable(int *enable); +BOOLEAN Gal_set_cursor_colors(unsigned long bkcolor, unsigned long fgcolor); +BOOLEAN Gal_get_cursor_colors(unsigned long *bkcolor, unsigned long *fgcolor); +BOOLEAN Gal_set_cursor_position(unsigned long memoffset, + unsigned short xpos, unsigned short ypos, + unsigned short xhotspot, + unsigned short yhotspot); +BOOLEAN Gal_get_cursor_position(unsigned long *memoffset, + unsigned short *xpos, unsigned short *ypos, + unsigned short *xhotspot, + unsigned short *yhotspot); +BOOLEAN Gal_set_cursor_shape32(unsigned long memoffset, + unsigned long *andmask, + unsigned long *xormask); + +BOOLEAN Gal_set_cursor_shape64(unsigned long memoffset, + unsigned long *andmask, + unsigned long *xormask); + +/** Render ********************************************************/ +BOOLEAN Gal_set_solid_pattern(unsigned long color); + +BOOLEAN Gal_set_mono_source(unsigned long bgcolor, unsigned long fgcolor, + unsigned char transparency); +BOOLEAN Gal_set_mono_pattern(unsigned long bgcolor, unsigned long fgcolor, + unsigned long data0, unsigned long data1, + unsigned char transparency); + +BOOLEAN Gal_set_raster_operation(unsigned char rop); + +BOOLEAN Gal_pattern_fill(unsigned short x, unsigned short y, + unsigned short width, unsigned short height); + +BOOLEAN Gal_set_solid_source(unsigned long color); + +BOOLEAN Gal_screen_to_screen_blt(unsigned short srcx, unsigned short srcy, + unsigned short dstx, unsigned short dsty, + unsigned short width, unsigned short height); + +BOOLEAN Gal_screen_to_screen_xblt(unsigned short srcx, + unsigned short srcy, + unsigned short dstx, + unsigned short dsty, + unsigned short width, + unsigned short height, unsigned long color); + +BOOLEAN Gal_bresenham_line(unsigned short x, unsigned short y, + unsigned short length, unsigned short initerr, + unsigned short axialerr, unsigned short diagerr, + unsigned short flags); + +BOOLEAN Gal_color_pattern_fill(unsigned short x, unsigned short y, + unsigned short width, unsigned short height, + unsigned long pattern); + +BOOLEAN Gal_color_bitmap_to_screen_blt(unsigned short srcx, + unsigned short srcy, + unsigned short dstx, + unsigned short dsty, + unsigned short width, + unsigned short height, + unsigned long data, long pitch); + +BOOLEAN Gal_color_bitmap_to_screen_xblt(unsigned short srcx, + unsigned short srcy, + unsigned short dstx, + unsigned short dsty, + unsigned short width, + unsigned short height, + unsigned long data, long pitch, + unsigned long color); + +BOOLEAN Gal_mono_bitmap_to_screen_blt(unsigned short srcx, + unsigned short srcy, + unsigned short dstx, + unsigned short dsty, + unsigned short width, + unsigned short height, + unsigned long data, short pitch); + +BOOLEAN Gal_text_blt(unsigned short dstx, unsigned short dsty, + unsigned short width, unsigned short height, + unsigned long data); + +/** Compression*******************************************************/ +BOOLEAN Gal_set_compression_enable(BOOLEAN); +BOOLEAN Gal_get_compression_enable(int *flag); +BOOLEAN Gal_set_compression_parameters(unsigned long flags, + unsigned long offset, + unsigned short pitch, + unsigned short size); +BOOLEAN Gal_get_compression_parameters(unsigned long flags, + unsigned long *offset, + unsigned short *pitch, + unsigned short *size); + +/** VGA **********************************************************/ +BOOLEAN Gal_vga_mode_switch(int active); +BOOLEAN Gal_vga_clear_extended(void); +BOOLEAN Gal_vga_pitch(PGAL_VGAMODEDATA pvregs, unsigned short pitch); +BOOLEAN Gal_vga_restore(PGAL_VGAMODEDATA pvregs); +BOOLEAN Gal_vga_save(PGAL_VGAMODEDATA pvregs); +BOOLEAN Gal_vga_mode(PGAL_VGAMODEDATA pvregs); +BOOLEAN Gal_vga_test_pci(int *softvga); +BOOLEAN Gal_vga_get_pci_command(unsigned char *value); +BOOLEAN Gal_vga_seq_reset(int reset); +BOOLEAN Gal_vga_set_graphics_bits(void); + +/** Panel **********************************************************/ +BOOLEAN Gal_pnl_set_params(unsigned long flags, PPnl_PanelParams pParam); +BOOLEAN Gal_pnl_get_params(unsigned long flags, PPnl_PanelParams pParam); +BOOLEAN Gal_pnl_init(PPnl_PanelParams pParam); +BOOLEAN Gal_pnl_save(void); +BOOLEAN Gal_pnl_restore(void); +BOOLEAN Gal_pnl_powerup(void); +BOOLEAN Gal_pnl_powerdown(void); +BOOLEAN Gal_enable_panning(int x, int y); +BOOLEAN Gal_pnl_enabled_in_bios(int *state); +BOOLEAN Gal_pnl_info_from_bios(int *xres, int *yres, int *bpp, int *hz); + +/** TV **********************************************************/ +BOOLEAN Gal_tv_set_params(unsigned long flags, PGAL_TVPARAMS pTV); +BOOLEAN Gal_tv_get_params(unsigned long flags, PGAL_TVPARAMS pTV); +BOOLEAN Gal_tv_set_timings(unsigned long flags, PGAL_TVTIMING pTV); +BOOLEAN Gal_tv_get_timings(unsigned long flags, PGAL_TVTIMING pTV); +BOOLEAN Gal_set_tv_enable(int bState); +BOOLEAN Gal_get_tv_enable(unsigned int *bState); +BOOLEAN Gal_is_tv_mode_supported(unsigned long flags, PGAL_TVPARAMS pTV, + int *bState); + +/** Video **********************************************************/ +BOOLEAN Gal_set_video_enable(int enable); +BOOLEAN Gal_set_video_format(int format); +BOOLEAN Gal_set_video_size(unsigned short width, unsigned short height); +BOOLEAN Gal_set_video_offset(unsigned long offset); +BOOLEAN Gal_set_video_yuv_offsets(unsigned long yoffset, + unsigned long uoffset, + unsigned long voffset); +BOOLEAN Gal_set_video_yuv_pitch(unsigned long ypitch, unsigned long uvpitch); + +BOOLEAN Gal_set_video_window(short x, short y, short w, short h); +BOOLEAN Gal_set_video_scale(unsigned short srcw, unsigned short srch, + unsigned short dstw, unsigned short dsth); +BOOLEAN Gal_set_video_filter(int xfilter, int yfilter); +BOOLEAN Gal_set_video_color_key(unsigned long key, + unsigned long mask, int bluescreen); +BOOLEAN Gal_set_video_downscale_enable(int enable); +BOOLEAN Gal_set_video_downscale_config(unsigned short type, unsigned short m); +BOOLEAN Gal_set_video_downscale_coefficients(unsigned short coef1, + unsigned short coef2, + unsigned short coef3, + unsigned short coef4); +BOOLEAN Gal_set_video_source(int source); +BOOLEAN Gal_set_video_interlaced(int enable); +BOOLEAN Gal_get_video_interlaced(int *interlaced); +BOOLEAN Gal_set_color_space_YUV(int enable); +BOOLEAN Gal_get_color_space_YUV(int *colorspace); +BOOLEAN Gal_set_video_cursor(unsigned long key, + unsigned long mask, + unsigned short select_color2, + unsigned long color1, unsigned long color2); +BOOLEAN Gal_get_video_cursor(unsigned long *key, + unsigned long *mask, + unsigned short *select_color2, + unsigned long *color1, unsigned long *color2); +BOOLEAN Gal_set_video_request(short x, short y); +BOOLEAN Gal_set_alpha_enable(int enable); +BOOLEAN Gal_get_alpha_enable(int *enable); +BOOLEAN Gal_get_alpha_size(unsigned short *x, unsigned short *y, + unsigned short *width, unsigned short *height); + +BOOLEAN Gal_set_video_request(short x, short y); +BOOLEAN Gal_set_alpha_window(short x, short y, + unsigned short width, unsigned short height); +BOOLEAN Gal_set_alpha_value(unsigned char alpha, char delta); +BOOLEAN Gal_get_alpha_value(unsigned char *alpha, char *delta); +BOOLEAN Gal_set_alpha_priority(int priority); +BOOLEAN Gal_get_alpha_priority(int *priority); +BOOLEAN Gal_set_alpha_color(unsigned long color); +BOOLEAN Gal_get_alpha_color(unsigned long *color); +BOOLEAN Gal_select_alpha_region(int region); +BOOLEAN Gal_set_video_outside_alpha(int enable); +BOOLEAN Gal_set_video_palette(unsigned long *palette); + +/* Icon related prototypes */ + +BOOLEAN Gal_set_icon_enable(int enable); +BOOLEAN Gal_set_icon_colors(unsigned long color0, unsigned long color1, + unsigned long color2); + +BOOLEAN Gal_set_icon_position(unsigned long memoffset, unsigned short xpos); +BOOLEAN Gal_set_icon_shape64(unsigned long memoffset, unsigned long *andmask, + unsigned long *xormask, unsigned int lines); + +/* Icon related prototypes */ + +BOOLEAN Gal_set_vip_enable(int enable); +BOOLEAN Gal_get_vip_enable(int *enable); +BOOLEAN Gal_set_vip_capture_run_mode(int mode); +BOOLEAN Gal_set_vip_base(unsigned long even, unsigned long odd); +BOOLEAN Gal_get_vip_base(unsigned long *address, int odd); +BOOLEAN Gal_set_vip_pitch(unsigned long pitch); +BOOLEAN Gal_get_vip_pitch(unsigned long *pitch); +BOOLEAN Gal_set_vip_mode(int mode); +BOOLEAN Gal_get_vip_mode(int *mode); +BOOLEAN Gal_set_vbi_enable(int enable); +BOOLEAN Gal_get_vbi_enable(int *enable); +BOOLEAN Gal_set_vbi_mode(int mode); +BOOLEAN Gal_get_vbi_mode(int *mode); +BOOLEAN Gal_set_vbi_base(unsigned long even, unsigned long odd); +BOOLEAN Gal_get_vbi_base(unsigned long *address, int odd); +BOOLEAN Gal_set_vbi_pitch(unsigned long pitch); +BOOLEAN Gal_get_vbi_pitch(unsigned long *pitch); +BOOLEAN Gal_set_vbi_direct(unsigned long even_lines, unsigned long odd_lines); +BOOLEAN Gal_get_vbi_direct(int odd, unsigned long *vbi_direct); +BOOLEAN Gal_set_vbi_interrupt(int enable); +BOOLEAN Gal_get_vbi_interrupt(int *enable); +BOOLEAN Gal_set_vip_bus_request_threshold_high(int enable); +BOOLEAN Gal_get_vip_bus_request_threshold_high(int *enable); +BOOLEAN Gal_set_vip_last_line(int last_line); +BOOLEAN Gal_test_vip_odd_field(int *status); +BOOLEAN Gal_test_vip_bases_updated(int *status); +BOOLEAN Gal_test_vip_fifo_overflow(int *status); +BOOLEAN Gal_get_vip_line(int *status); + +/* Second generation rendering routines */ + +BOOLEAN Gal_set_source_stride(unsigned short stride); +BOOLEAN Gal_set_destination_stride(unsigned short stride); +BOOLEAN Gal_set_source_transparency(unsigned long color, unsigned long mask); +BOOLEAN Gal2_set_source_transparency(unsigned long color, unsigned long mask); +BOOLEAN Gal2_set_source_stride(unsigned short stride); +BOOLEAN Gal2_set_destination_stride(unsigned short stride); +BOOLEAN Gal2_set_pattern_origin(int x, int y); +BOOLEAN Gal2_set_alpha_mode(int mode); +BOOLEAN Gal2_set_alpha_value(unsigned char value); +BOOLEAN Gal2_pattern_fill(unsigned long dstoffset, unsigned short width, + unsigned short height); +BOOLEAN Gal2_color_pattern_fill(unsigned long dstoffset, unsigned short width, + unsigned short height, unsigned long pattern); +BOOLEAN Gal2_screen_to_screen_blt(unsigned long srcoffset, + unsigned long dstoffset, + unsigned short width, unsigned short height, + int flags); + +BOOLEAN Gal2_mono_expand_blt(unsigned long srcbase, unsigned short srcx, + unsigned short srcy, unsigned long dstoffset, + unsigned short width, unsigned short height, + int byte_packed); + +BOOLEAN Gal2_color_bitmap_to_screen_blt(unsigned short srcx, + unsigned short srcy, + unsigned long dstoffset, + unsigned short width, + unsigned short height, + unsigned char *data, + unsigned short pitch); +BOOLEAN Gal2_mono_bitmap_to_screen_blt(unsigned short srcx, + unsigned short srcy, + unsigned long dstoffset, + unsigned short width, + unsigned short height, + unsigned char *data, + unsigned short pitch); + +BOOLEAN Gal2_text_blt(unsigned long dstoffset, + unsigned short width, + unsigned short height, unsigned long data); +BOOLEAN Gal2_bresenham_line(unsigned long dstoffset, + unsigned short length, unsigned short initerr, + unsigned short axialerr, unsigned short diagerr, + unsigned short flags); +BOOLEAN Gal2_sync_to_vblank(void); + +/* Video routines */ + +BOOLEAN Gal_set_video_yuv_pitch(unsigned long ypitch, unsigned long uvpitch); +BOOLEAN Gal_get_video_yuv_pitch(unsigned long *ypitch, + unsigned long *uvpitch); + +BOOLEAN Gal_set_video_yuv_offsets(unsigned long yoffset, + unsigned long uoffset, + unsigned long voffset); +BOOLEAN Gal_get_video_yuv_offsets(unsigned long *yoffset, + unsigned long *uoffset, + unsigned long *voffset); + +BOOLEAN Gal_set_video_left_crop(unsigned short x); +BOOLEAN Gal_set_video_vertical_downscale(unsigned short srch, + unsigned short dsth); + +BOOLEAN Gal_set_vbi_source(VbiSourceType source); +BOOLEAN Gal_get_vbi_source(VbiSourceType * source); + +BOOLEAN Gal_set_vbi_lines(unsigned long even, unsigned long odd); +BOOLEAN Gal_get_vbi_lines(int odd, unsigned long *lines); + +BOOLEAN Gal_set_vbi_total(unsigned long even, unsigned long odd); +BOOLEAN Gal_get_vbi_total(int odd, unsigned long *total); + +BOOLEAN Gal_set_vertical_scaler_offset(char offset); +BOOLEAN Gal_get_vertical_scaler_offset(char *offset); +BOOLEAN Gal_get_genlock_enable(int *enable); +BOOLEAN Gal_set_genlock_enable(int flags); +BOOLEAN Gal_get_genlock_delay(unsigned long *delay); +BOOLEAN Gal_set_genlock_delay(unsigned long delay); +BOOLEAN Gal_set_top_line_in_odd(int enable); + +BOOLEAN Gal_read_crc(unsigned long *crc); +BOOLEAN Gal_read_window_crc(int source, unsigned short x, unsigned short y, + unsigned short width, unsigned short height, + int crc32, unsigned long *crc); + +BOOLEAN Gal_set_macrovision_enable(int enable); +BOOLEAN Gal_get_macrovision_enable(int *enable); + +/* MSR routines */ + +BOOLEAN Gal_id_msr_dev_address(MSR * pDev, unsigned long address); +BOOLEAN Gal_get_msr_dev_address(unsigned int device, unsigned long *address); + +#endif diff --git a/Source/DirectFB/gfxdrivers/nsc/include/pnl_defs.h b/Source/DirectFB/gfxdrivers/nsc/include/pnl_defs.h new file mode 100755 index 0000000..62de7bb --- /dev/null +++ b/Source/DirectFB/gfxdrivers/nsc/include/pnl_defs.h @@ -0,0 +1,201 @@ +/* + * $Workfile: pnl_defs.h $ + * + * File Contents: This file contains definitions of the Geode + * frame buffer panel data structures. + * + * SubModule: Geode FlatPanel library + * + */ + +/* NSC_LIC_ALTERNATIVE_PREAMBLE + * + * Revision 1.0 + * + * National Semiconductor Alternative GPL-BSD License + * + * National Semiconductor Corporation licenses this software + * ("Software"): + * + * National Xfree frame buffer driver + * + * under one of the two following licenses, depending on how the + * Software is received by the Licensee. + * + * If this Software is received as part of the Linux Framebuffer or + * other GPL licensed software, then the GPL license designated + * NSC_LIC_GPL applies to this Software; in all other circumstances + * then the BSD-style license designated NSC_LIC_BSD shall apply. + * + * END_NSC_LIC_ALTERNATIVE_PREAMBLE */ + +/* NSC_LIC_BSD + * + * National Semiconductor Corporation Open Source License for + * + * National Xfree frame buffer driver + * + * (BSD License with Export Notice) + * + * Copyright (c) 1999-2001 + * National Semiconductor Corporation. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * * Redistributions in binary form must reproduce the above + * copyright notice, this list of conditions and the following + * disclaimer in the documentation and/or other materials provided + * with the distribution. + * + * * Neither the name of the National Semiconductor Corporation nor + * the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior + * written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER + * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE, + * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF + * YOUR JURISDICTION. It is licensee's responsibility to comply with + * any export regulations applicable in licensee's jurisdiction. Under + * CURRENT (2001) U.S. export regulations this software + * is eligible for export from the U.S. and can be downloaded by or + * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed + * destinations which include Cuba, Iraq, Libya, North Korea, Iran, + * Syria, Sudan, Afghanistan and any other country to which the U.S. + * has embargoed goods and services. + * + * END_NSC_LIC_BSD */ + +/* NSC_LIC_GPL + * + * National Semiconductor Corporation Gnu General Public License for + * + * National Xfree frame buffer driver + * + * (GPL License with Export Notice) + * + * Copyright (c) 1999-2001 + * National Semiconductor Corporation. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted under the terms of the GNU General + * Public License as published by the Free Software Foundation; either + * version 2 of the License, or (at your option) any later version + * + * In addition to the terms of the GNU General Public License, neither + * the name of the National Semiconductor Corporation nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER + * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE, + * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. See the GNU General Public License for more details. + * + * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF + * YOUR JURISDICTION. It is licensee's responsibility to comply with + * any export regulations applicable in licensee's jurisdiction. Under + * CURRENT (2001) U.S. export regulations this software + * is eligible for export from the U.S. and can be downloaded by or + * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed + * destinations which include Cuba, Iraq, Libya, North Korea, Iran, + * Syria, Sudan, Afghanistan and any other country to which the U.S. + * has embargoed goods and services. + * + * You should have received a copy of the GNU General Public License + * along with this file; if not, write to the Free Software Foundation, + * Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + * END_NSC_LIC_GPL */ + +#ifndef _pnl_defs_h +#define _pnl_defs_h + +typedef enum +{ + MARMOT_PLATFORM = 0, + UNICORN_PLATFORM, + CENTAURUS_PLATFORM, + ARIES_PLATFORM, + CARMEL_PLATFORM, + HYDRA_PLATFORM, + DORADO_PLATFORM, + DRACO_PLATFORM, + REDCLOUD_PLATFORM, + OTHER_PLATFORM +} +SYS_BOARD; + +#define PNL_9210 0x01 +#define PNL_9211_A 0x02 +#define PNL_9211_C 0x04 +#define PNL_UNKNOWN_CHIP 0x08 + +#define PNL_TFT 0x01 +#define PNL_SSTN 0x02 +#define PNL_DSTN 0x04 +#define PNL_TWOP 0x08 +#define PNL_UNKNOWN_PANEL 0x10 + +#define PNL_MONO_PANEL 0x01 +#define PNL_COLOR_PANEL 0x02 +#define PNL_UNKNOWN_COLOR 0x08 + +#define PNL_PANELPRESENT 0x01 +#define PNL_PLATFORM 0x02 +#define PNL_PANELCHIP 0x04 +#define PNL_PANELSTAT 0x08 +#define PNL_OVERRIDE_STAT 0x10 +#define PNL_OVERRIDE_ALL 0x1F + +typedef struct _Pnl_PanelStat_ +{ + int Type; + int XRes; + int YRes; + int Depth; + int MonoColor; +} +Pnl_PanelStat; + +typedef struct _Pnl_Params_ +{ + unsigned long Flags; + int PanelPresent; + int Platform; + int PanelChip; + Pnl_PanelStat PanelStat; +} +Pnl_PanelParams, *PPnl_PanelParams; + +#endif /* _pnl_defs_h */ + +/* END OF FILE */ |