diff options
Diffstat (limited to 'Source/DirectFB/gfxdrivers/i810')
| -rwxr-xr-x | Source/DirectFB/gfxdrivers/i810/Makefile.am | 35 | ||||
| -rwxr-xr-x | Source/DirectFB/gfxdrivers/i810/Makefile.in | 597 | ||||
| -rwxr-xr-x | Source/DirectFB/gfxdrivers/i810/i810.c | 1044 | ||||
| -rwxr-xr-x | Source/DirectFB/gfxdrivers/i810/i810.h | 832 | ||||
| -rwxr-xr-x | Source/DirectFB/gfxdrivers/i810/i810_overlay.c | 598 |
5 files changed, 3106 insertions, 0 deletions
diff --git a/Source/DirectFB/gfxdrivers/i810/Makefile.am b/Source/DirectFB/gfxdrivers/i810/Makefile.am new file mode 100755 index 0000000..76e3d95 --- /dev/null +++ b/Source/DirectFB/gfxdrivers/i810/Makefile.am @@ -0,0 +1,35 @@ +## Makefile.am for DirectFB/src/core/gfxcards/i810 + +INCLUDES = \ + -I$(top_builddir)/include \ + -I$(top_srcdir)/include \ + -I$(top_builddir)/lib \ + -I$(top_srcdir)/lib \ + -I$(top_srcdir)/src \ + -I$(top_srcdir)/systems + +i810_LTLIBRARIES = libdirectfb_i810.la + +if BUILD_STATIC +i810_DATA = $(i810_LTLIBRARIES:.la=.o) +endif + +i810dir = $(MODULEDIR)/gfxdrivers + +libdirectfb_i810_la_SOURCES = \ + i810.c \ + i810.h \ + i810_overlay.c + +libdirectfb_i810_la_LDFLAGS = \ + -module \ + -avoid-version \ + $(DFB_LDFLAGS) + +libdirectfb_i810_la_LIBADD = \ + $(top_builddir)/lib/direct/libdirect.la \ + $(top_builddir)/src/libdirectfb.la + + +include $(top_srcdir)/rules/libobject.make + diff --git a/Source/DirectFB/gfxdrivers/i810/Makefile.in b/Source/DirectFB/gfxdrivers/i810/Makefile.in new file mode 100755 index 0000000..f118862 --- /dev/null +++ b/Source/DirectFB/gfxdrivers/i810/Makefile.in @@ -0,0 +1,597 @@ +# Makefile.in generated by automake 1.10.1 from Makefile.am. +# @configure_input@ + +# Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, +# 2003, 2004, 2005, 2006, 2007, 2008 Free Software Foundation, Inc. +# This Makefile.in is free software; the Free Software Foundation +# gives unlimited permission to copy and/or distribute it, +# with or without modifications, as long as this notice is preserved. + +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY, to the extent permitted by law; without +# even the implied warranty of MERCHANTABILITY or FITNESS FOR A +# PARTICULAR PURPOSE. + +@SET_MAKE@ + + +VPATH = @srcdir@ +pkgdatadir = $(datadir)/@PACKAGE@ +pkglibdir = $(libdir)/@PACKAGE@ +pkgincludedir = $(includedir)/@PACKAGE@ +am__cd = CDPATH="$${ZSH_VERSION+.}$(PATH_SEPARATOR)" && cd +install_sh_DATA = $(install_sh) -c -m 644 +install_sh_PROGRAM = $(install_sh) -c +install_sh_SCRIPT = $(install_sh) -c +INSTALL_HEADER = $(INSTALL_DATA) +transform = $(program_transform_name) +NORMAL_INSTALL = : +PRE_INSTALL = : +POST_INSTALL = : +NORMAL_UNINSTALL = : +PRE_UNINSTALL = : +POST_UNINSTALL = : +build_triplet = @build@ +host_triplet = @host@ +target_triplet = @target@ +DIST_COMMON = $(srcdir)/Makefile.am $(srcdir)/Makefile.in \ + $(top_srcdir)/rules/libobject.make +subdir = gfxdrivers/i810 +ACLOCAL_M4 = $(top_srcdir)/aclocal.m4 +am__aclocal_m4_deps = $(top_srcdir)/m4/as-ac-expand.m4 \ + $(top_srcdir)/configure.in +am__configure_deps = $(am__aclocal_m4_deps) $(CONFIGURE_DEPENDENCIES) \ + $(ACLOCAL_M4) +mkinstalldirs = $(install_sh) -d +CONFIG_HEADER = $(top_builddir)/config.h +CONFIG_CLEAN_FILES = +am__vpath_adj_setup = srcdirstrip=`echo "$(srcdir)" | sed 's|.|.|g'`; +am__vpath_adj = case $$p in \ + $(srcdir)/*) f=`echo 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maintainer-clean-generic + +mostlyclean: mostlyclean-am + +mostlyclean-am: mostlyclean-compile mostlyclean-generic \ + mostlyclean-libtool + +pdf: pdf-am + +pdf-am: + +ps: ps-am + +ps-am: + +uninstall-am: uninstall-i810DATA uninstall-i810LTLIBRARIES + +.MAKE: install-am install-strip + +.PHONY: CTAGS GTAGS all all-am check check-am clean clean-generic \ + clean-i810LTLIBRARIES clean-libtool ctags distclean \ + distclean-compile distclean-generic distclean-libtool \ + distclean-tags distdir dvi dvi-am html html-am info info-am \ + install install-am install-data install-data-am install-dvi \ + install-dvi-am install-exec install-exec-am install-html \ + install-html-am install-i810DATA install-i810LTLIBRARIES \ + install-info install-info-am install-man install-pdf \ + install-pdf-am install-ps install-ps-am install-strip \ + installcheck installcheck-am installdirs maintainer-clean \ + maintainer-clean-generic mostlyclean mostlyclean-compile \ + mostlyclean-generic mostlyclean-libtool pdf pdf-am ps ps-am \ + tags uninstall uninstall-am uninstall-i810DATA \ + uninstall-i810LTLIBRARIES + +%.o: .libs/%.a %.la + rm -f $<.tmp/*.o + if test -d $<.tmp; then rmdir $<.tmp; fi + mkdir $<.tmp + (cd $<.tmp && $(AR) x ../../$<) + $(LD) -o $@ -r $<.tmp/*.o + rm -f $<.tmp/*.o && rmdir $<.tmp + +.PHONY: $(LTLIBRARIES:%.la=.libs/%.a) +# Tell versions [3.59,3.63) of GNU make to not export all variables. +# Otherwise a system limit (for SysV at least) may be exceeded. +.NOEXPORT: diff --git a/Source/DirectFB/gfxdrivers/i810/i810.c b/Source/DirectFB/gfxdrivers/i810/i810.c new file mode 100755 index 0000000..0c3d0ff --- /dev/null +++ b/Source/DirectFB/gfxdrivers/i810/i810.c @@ -0,0 +1,1044 @@ +/* + (c) Copyright 2001-2009 The world wide DirectFB Open Source Community (directfb.org) + (c) Copyright 2000-2004 Convergence (integrated media) GmbH + + All rights reserved. + + Written by Antonino Daplas <adaplas@pol.net> + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the + Free Software Foundation, Inc., 59 Temple Place - Suite 330, + Boston, MA 02111-1307, USA. +*/ + +#include <config.h> + +#include <fbdev/fbdev.h> /* FIXME: Needs to be included before dfb_types.h to work around a type clash with asm/types.h */ +#include <dfb_types.h> + +#include <stdio.h> +#include <unistd.h> +#include <stdlib.h> +#include <string.h> + +#include <sys/mman.h> +#include <fcntl.h> +#include <sys/ioctl.h> +#include <malloc.h> + +#include <directfb.h> + +#include <core/coredefs.h> +#include <core/coretypes.h> +#include <core/screens.h> + +#include <core/state.h> +#include <core/gfxcard.h> +#include <core/surface.h> + +/* need fb handle to get accel, MMIO programming in the i810 is useless */ +#include <gfx/convert.h> +#include <gfx/util.h> +#include <misc/conf.h> +#include <misc/util.h> + +#include <core/graphics_driver.h> + +DFB_GRAPHICS_DRIVER( i810 ) + +#include "i810.h" + + +#define TIMER_LOOP 1000000000 +#define BUFFER_PADDING 2 +#define MMIO_SIZE 512 * 1024 + +#define I810_SUPPORTED_DRAWINGFLAGS (DSDRAW_NOFX) + +#define I810_SUPPORTED_DRAWINGFUNCTIONS \ + (DFXL_FILLRECTANGLE | DFXL_DRAWRECTANGLE | DFXL_FILLTRIANGLE) + +#define I810_SUPPORTED_BLITTINGFLAGS \ + (DSBLIT_SRC_COLORKEY | DSBLIT_DST_COLORKEY) + +#define I810_SUPPORTED_BLITTINGFUNCTIONS \ + (DFXL_BLIT) + +static void +i810_lring_enable(I810DriverData *i810drv, u32 mode) +{ + u32 tmp; + + tmp = i810_readl(i810drv->mmio_base, LRING + 12); + tmp = (!mode) ? tmp & ~1 : tmp | 1; + + i810_writel(i810drv->mmio_base, LRING + 12, tmp); +} + + +static inline void +i810_wait_for_blit_idle(I810DriverData *i810drv, + I810DeviceData *i810dev ) +{ + u32 count = 0; + + if (i810dev != NULL) + i810dev->idle_calls++; + + while ((i810_readw(i810drv->mmio_base, INSTDONE) & 0x7b) != 0x7b && + count++ < TIMER_LOOP) { + if (i810dev != NULL) + i810dev->idle_waitcycles++; + } + + if (count >= TIMER_LOOP) { + if (i810dev != NULL) + i810dev->idle_timeoutsum++; + D_BUG("warning: idle timeout exceeded"); + } +} + +static void +i810_init_ringbuffer(I810DriverData *i810drv, + I810DeviceData *i810dev ) +{ + u32 tmp1, tmp2; + + i810_wait_for_blit_idle(i810drv, i810dev); + i810_lring_enable(i810drv, 0); + + i810_writel(i810drv->mmio_base, LRING, 0); + i810_writel(i810drv->mmio_base, LRING + 4, 0); + i810dev->cur_tail = 0; + + tmp2 = i810_readl(i810drv->mmio_base, LRING + 8) & ~RBUFFER_START_MASK; + tmp1 = i810dev->lring_bind.pg_start * 4096; + i810_writel(i810drv->mmio_base, LRING + 8, tmp2 | tmp1); + + tmp1 = i810_readl(i810drv->mmio_base, LRING + 12); + tmp1 &= ~RBUFFER_SIZE_MASK; + tmp2 = (RINGBUFFER_SIZE - 4096) & RBUFFER_SIZE_MASK; + i810_writel(i810drv->mmio_base, LRING + 12, tmp1 | tmp2); + i810_lring_enable(i810drv, 1); +} + +static inline int +i810_wait_for_space(I810DriverData *i810drv, + I810DeviceData *i810dev, + u32 space ) +{ + u32 head, count = TIMER_LOOP, tail, tries = 0; + + i810dev->waitfifo_calls++; + + tail = i810dev->cur_tail; + + space += BUFFER_PADDING; + space <<= 2; + i810dev->waitfifo_sum += space; + + while (count--) { + i810dev->fifo_waitcycles++; + head = i810_readl(i810drv->mmio_base, LRING + 4) & RBUFFER_HEAD_MASK; + if ((tail == head) || + (tail > head && (RINGBUFFER_SIZE - tail + head) >= space) || + (tail < head && (head - tail) >= space)) { + if (!tries) + i810dev->fifo_cache_hits++; + return 0; + } + tries++; + } + D_BUG("warning: buffer space timout error"); + return 1; +} + + +static void +i810FlushTextureCache(void *drv, void *dev) +{ + I810DriverData *i810drv = (I810DriverData *) drv; + I810DeviceData *i810dev = (I810DeviceData *) dev; + + if (BEGIN_LRING(i810drv, i810dev, 2)) return; + + PUT_LRING(PARSER | FLUSH); + PUT_LRING(NOP); + + END_LRING(i810drv); +} + +static DFBResult +i810EngineSync(void *drv, void *dev) +{ + I810DriverData *i810drv = (I810DriverData *) drv; + I810DeviceData *i810dev = (I810DeviceData *) dev; + + i810_wait_for_blit_idle(i810drv, i810dev); + + return DFB_OK; +} + +/* + * Set State routines + */ +static inline void +i810_set_src(I810DriverData *i810drv, + I810DeviceData *i810dev, + CardState *state) +{ + if (i810dev->i_src) + return; + i810dev->srcaddr = dfb_gfxcard_memory_physical((CoreGraphicsDevice *) i810dev, + state->src.offset); + i810dev->srcpitch = state->src.pitch; + + i810dev->i_src = 1; +} + +static inline void +i810_set_dest(I810DriverData *i810drv, + I810DeviceData *i810dev, + CardState *state) +{ + CoreSurface *destination = state->destination; + + if (i810dev->i_dst) + return; + i810dev->destaddr = dfb_gfxcard_memory_physical((CoreGraphicsDevice *) i810dev, + state->dst.offset); + i810dev->destpitch = state->dst.pitch; + + switch (destination->config.format) { + case DSPF_LUT8: + i810dev->pixeldepth = 1; + i810dev->blit_color = BPP8; + break; + case DSPF_ARGB1555: + i810dev->pixeldepth = 2; + i810dev->blit_color = BPP16; + break; + case DSPF_RGB16: + i810dev->pixeldepth = 2; + i810dev->blit_color = BPP16; + break; + case DSPF_RGB24: + i810dev->pixeldepth = 3; + i810dev->blit_color = BPP24; + break; + default: + D_BUG("unexpected pixelformat~"); + } + i810dev->i_dst = 1; +} + +static inline void +i810_set_colorkey(I810DriverData *i810drv, + I810DeviceData *i810dev, + CardState *state) +{ + if (i810dev->i_colorkey) + return; + + i810dev->colorkey_bit = 0; + if (state->blittingflags & DSBLIT_SRC_COLORKEY) { + i810dev->colorkey_bit = 1 << 8; + i810dev->colorkey = state->src_colorkey; + } + else { + i810dev->colorkey_bit = 7 << 8; + i810dev->colorkey = state->dst_colorkey; + } + + i810dev->i_colorkey = 1; +} + +static inline void +i810_set_color(I810DriverData *i810drv, + I810DeviceData *i810dev, + CardState *state) +{ + if (i810dev->i_color) + return; + + switch (state->destination->config.format) { + case DSPF_LUT8: + i810dev->color_value = state->color_index; + break; + case DSPF_ARGB1555: + i810dev->color_value = PIXEL_ARGB1555(state->color.a, + state->color.r, + state->color.g, + state->color.b); + break; + case DSPF_RGB16: + i810dev->color_value = PIXEL_RGB16(state->color.r, + state->color.g, + state->color.b); + break; + case DSPF_RGB24: + i810dev->color_value = PIXEL_RGB32(state->color.r, + state->color.g, + state->color.b); + break; + default: + D_BUG("unexpected pixelformat~"); + } + i810dev->i_color = 1; +} + +static inline void +i810_set_clip(I810DriverData *i810drv, + I810DeviceData *i810dev, + DFBRegion *clip ) +{ + if (i810dev->i_clip) + return; + + i810dev->clip_x1 = clip->x1; + i810dev->clip_x2 = clip->x2 + 1; + i810dev->clip_y1 = clip->y1; + i810dev->clip_y2 = clip->y2 + 1; + + i810dev->i_clip = 1; +} + +static void +i810CheckState(void *drv, void *dev, + CardState *state, DFBAccelerationMask accel ) +{ + switch (state->destination->config.format) { + case DSPF_LUT8: + case DSPF_ARGB1555: + case DSPF_RGB16: + case DSPF_RGB24: + break; + default: + return; + } + + if (!(accel & ~I810_SUPPORTED_DRAWINGFUNCTIONS) && + !(state->drawingflags & ~I810_SUPPORTED_DRAWINGFLAGS)) + state->accel |= I810_SUPPORTED_DRAWINGFUNCTIONS; + + if (!(accel & ~I810_SUPPORTED_BLITTINGFUNCTIONS) && + !(state->blittingflags & ~I810_SUPPORTED_BLITTINGFLAGS)) { + if (state->source->config.format == state->destination->config.format) + state->accel |= I810_SUPPORTED_BLITTINGFUNCTIONS; + } +} + +static void +i810SetState( void *drv, void *dev, + GraphicsDeviceFuncs *funcs, + CardState *state, DFBAccelerationMask accel ) +{ + I810DriverData *i810drv = (I810DriverData *) drv; + I810DeviceData *i810dev = (I810DeviceData *) dev; + + if (state->mod_hw) { + if ((state->mod_hw & SMF_SOURCE) && state->source) + i810dev->i_src = 0; + if (state->mod_hw & SMF_DESTINATION) + i810dev->i_dst = 0; + if (state->mod_hw & SMF_COLOR) + i810dev->i_color = 0; + if (state->mod_hw & SMF_CLIP) + i810dev->i_clip = 0; + if (state->mod_hw & SMF_SRC_COLORKEY || + state->mod_hw & SMF_DST_COLORKEY) { + i810dev->i_colorkey = 0; + } + } + + switch (accel) { + case DFXL_DRAWRECTANGLE: + case DFXL_FILLRECTANGLE: + case DFXL_FILLTRIANGLE: + i810_set_dest(i810drv, i810dev, state); + i810_set_color(i810drv, i810dev, state); + i810_set_clip(i810drv, i810dev, &state->clip); + state->set |= DFXL_FILLRECTANGLE | DFXL_DRAWRECTANGLE; + break; + case DFXL_BLIT: + i810_set_src( i810drv, i810dev, state); + i810_set_dest(i810drv, i810dev, state); + i810_set_color(i810drv, i810dev, state); + i810_set_clip(i810drv, i810dev, &state->clip); + if (state->blittingflags & DSBLIT_SRC_COLORKEY || + state->blittingflags & DSBLIT_DST_COLORKEY) + i810_set_colorkey(i810drv, i810dev, state); + state->set |= DFXL_BLIT; + break; + default: + D_BUG("unexpected drawing/blitting function"); + } + state->mod_hw = 0; +} + +static bool +i810FillRectangle( void *drv, void *dev, DFBRectangle *rect ) +{ + I810DriverData *i810drv = (I810DriverData *) drv; + I810DeviceData *i810dev = (I810DeviceData *) dev; + u32 dest; + + + if (rect->x < i810dev->clip_x1) + rect->x = i810dev->clip_x1; + if (i810dev->clip_x2 < rect->x + rect->w) + rect->w = i810dev->clip_x2 - rect->x; + if (rect->y < i810dev->clip_y1) + rect->y = i810dev->clip_y1; + if (i810dev->clip_y2 < rect->y + rect->h) + rect->h = i810dev->clip_y2 - rect->y; + + rect->x *= i810dev->pixeldepth; + rect->w *= i810dev->pixeldepth; + dest = i810dev->destaddr + rect->x + (rect->y * i810dev->destpitch); + + if (BEGIN_LRING(i810drv, i810dev, 6)) return false; + + PUT_LRING(BLIT | COLOR_BLT | 3); + PUT_LRING(COLOR_COPY_ROP << 16 | i810dev->destpitch | SOLIDPATTERN | + DYN_COLOR_EN | i810dev->blit_color); + PUT_LRING(rect->h << 16 | rect->w); + PUT_LRING(dest); + PUT_LRING(i810dev->color_value); + PUT_LRING(NOP); + + END_LRING(i810drv); + + return true; +} + +static bool +i810DrawRectangle( void *drv, void *dev, DFBRectangle *rect ) +{ + I810DriverData *i810drv = (I810DriverData *) drv; + I810DeviceData *i810dev = (I810DeviceData *) dev; + u32 dest; + + + if (rect->x < i810dev->clip_x1) + rect->x = i810dev->clip_x1; + if (i810dev->clip_x2 < rect->x + rect->w) + rect->w = i810dev->clip_x2 - rect->x; + if (rect->y < i810dev->clip_y1) + rect->y = i810dev->clip_y1; + if (i810dev->clip_y2 < rect->y + rect->h) + rect->h = i810dev->clip_y2 - rect->y; + + + + rect->x *= i810dev->pixeldepth; + rect->w *= i810dev->pixeldepth; + + if (BEGIN_LRING(i810drv, i810dev, 20)) return false; + + /* horizontal line 1 */ + dest = i810dev->destaddr + rect->x + (rect->y * i810dev->destpitch); + PUT_LRING(BLIT | COLOR_BLT | 3); + PUT_LRING(COLOR_COPY_ROP << 16 | i810dev->destpitch | SOLIDPATTERN | + DYN_COLOR_EN | i810dev->blit_color); + PUT_LRING(1 << 16 | rect->w); + PUT_LRING(dest); + PUT_LRING(i810dev->color_value); + + /* vertical line 1 */ + PUT_LRING(BLIT | COLOR_BLT | 3); + PUT_LRING(COLOR_COPY_ROP << 16 | i810dev->destpitch | SOLIDPATTERN | + DYN_COLOR_EN | i810dev->blit_color); + PUT_LRING(rect->h << 16 | i810dev->pixeldepth); + PUT_LRING(dest); + PUT_LRING(i810dev->color_value); + + /* vertical line 2 */ + dest += rect->w; + PUT_LRING(BLIT | COLOR_BLT | 3); + PUT_LRING(COLOR_COPY_ROP << 16 | i810dev->destpitch | SOLIDPATTERN | + DYN_COLOR_EN | i810dev->blit_color); + PUT_LRING(rect->h << 16 | i810dev->pixeldepth); + PUT_LRING(dest); + PUT_LRING(i810dev->color_value); + + /* horizontal line 2 */ + dest -= rect->w; + dest += rect->h * i810dev->destpitch; + PUT_LRING(BLIT | COLOR_BLT | 3); + PUT_LRING(COLOR_COPY_ROP << 16 | i810dev->destpitch | SOLIDPATTERN | + DYN_COLOR_EN | i810dev->blit_color); + PUT_LRING(1 << 16 | rect->w); + PUT_LRING(dest); + PUT_LRING(i810dev->color_value); + + END_LRING(i810drv); + + return true; +} + +static bool +i810Blit( void *drv, void *dev, DFBRectangle *rect, int dx, int dy ) +{ + I810DriverData *i810drv = (I810DriverData *) drv; + I810DeviceData *i810dev = (I810DeviceData *) dev; + int xdir = INCREMENT, spitch = 0, dpitch = 0, src, dest; + + if (dx < i810dev->clip_x1) { + rect->w = MIN((i810dev->clip_x2 - i810dev->clip_x1), + (dx + rect->w) - i810dev->clip_x1); + rect->x += i810dev->clip_x1 - dx; + dx = i810dev->clip_x1; + } + if (i810dev->clip_x2 < dx + rect->w) + rect->w = i810dev->clip_x2 - dx; + + if (dy < i810dev->clip_y1) { + rect->h = MIN((i810dev->clip_y2 - i810dev->clip_y1), + (dy + rect->h) - i810dev->clip_y1); + rect->y += i810dev->clip_y1 - dy; + dy = i810dev->clip_y1; + } + if (i810dev->clip_y2 < dy + rect->h) + rect->h = i810dev->clip_y2 - dy; + + rect->x *= i810dev->pixeldepth; + dx *= i810dev->pixeldepth; + rect->w *= i810dev->pixeldepth; + + spitch = i810dev->srcpitch; + dpitch = i810dev->destpitch; + + if (i810dev->srcaddr == i810dev->destaddr) { + if (dx > rect->x && dx < rect->x + rect->w) { + xdir = DECREMENT; + rect->x += rect->w - 1; + dx += rect->w - 1; + } + if (dy > rect->y && dy < rect->y + rect->h) { + i810dev->srcpitch = (-(i810dev->srcpitch)) & 0xFFFF; + i810dev->destpitch = (-(i810dev->destpitch)) & 0xFFFF; + rect->y += rect->h - 1; + dy += rect->h - 1; + } + } + + src = i810dev->srcaddr + rect->x + (rect->y * spitch); + dest = i810dev->destaddr + dx + (dy * dpitch); + + BEGIN_LRING(i810drv, i810dev, 8); + + PUT_LRING(BLIT | FULL_BLIT | 0x6 | i810dev->colorkey_bit); + PUT_LRING(xdir | PAT_COPY_ROP << 16 | i810dev->destpitch | + DYN_COLOR_EN | i810dev->blit_color); + PUT_LRING((rect->h << 16) | rect->w); + PUT_LRING(dest); + PUT_LRING(i810dev->srcpitch); + PUT_LRING(src); + PUT_LRING(i810dev->colorkey); + PUT_LRING((u32)(unsigned long) i810drv->pattern_base); + + END_LRING(i810drv); + + return true; +} + +/* + * The software rasterizer when rendering non-axis aligned + * edges uses line spanning. In our case, it will use + * FillRect to render a 1 pixel-high rectangle. However, + * this would be slow in the i810 since for each rectangle, + * an ioctl has to be done which is very slow. As a temporary + * replacement, I'll include a SpanLine function that will + * not do an ioctl for every line. This should be + * significantly faster. + */ + +/* borrowed heavily and shamelessly from gfxcard.c */ + +typedef struct { + int xi; + int xf; + int mi; + int mf; + int _2dy; +} DDA; + +#define SETUP_DDA(xs,ys,xe,ye,dda) \ + do { \ + int dx = xe - xs; \ + int dy = ye - ys; \ + dda.xi = xs; \ + if (dy != 0) { \ + dda.mi = dx / dy; \ + dda.mf = 2*(dx % dy); \ + dda.xf = -dy; \ + dda._2dy = 2*dy; \ + if (dda.mf < 0) { \ + dda.mf += ABS(dy)*2; \ + dda.mi--; \ + } \ + } \ + else { \ + dda.mi = 0; \ + dda.mf = 0; \ + dda.xf = 0; \ + dda._2dy = 0; \ + } \ + } while (0) + + +#define INC_DDA(dda) \ + do { \ + dda.xi += dda.mi; \ + dda.xf += dda.mf; \ + if (dda.xf > 0) { \ + dda.xi++; \ + dda.xf -= dda._2dy; \ + } \ + } while (0) + + + +/* + * The i810fill_tri function takes advantage of the buffer. + * It will fill up the buffer until it's done rendering the + * triangle. + */ +static inline bool +i810fill_tri( DFBTriangle *tri, + I810DriverData *i810drv, + I810DeviceData *i810dev ) +{ + int y, yend; + + DDA dda1, dda2; + u32 total, dest = 0; + + y = tri->y1; + yend = tri->y3; + + if (y < i810dev->clip_y1) + y = i810dev->clip_y1; + if (yend > i810dev->clip_y2) + yend = i810dev->clip_y2; + + + SETUP_DDA(tri->x1, tri->y1, tri->x3, tri->y3, dda1); + SETUP_DDA(tri->x1, tri->y1, tri->x2, tri->y2, dda2); + + total = (yend - y) * 5; + if (total + BUFFER_PADDING > RINGBUFFER_SIZE/4) { + D_BUG("fill_triangle: buffer size is too small\n"); + return false; + } + + BEGIN_LRING(i810drv, i810dev, total); + + while (y < yend) { + DFBRectangle rect; + + if (y == tri->y2) { + if (tri->y2 == tri->y3) + return true; + SETUP_DDA(tri->x2, tri->y2, tri->x3, tri->y3, dda2); + } + + rect.w = ABS(dda1.xi - dda2.xi); + rect.x = MIN(dda1.xi, dda2.xi); + + if (rect.w > 0) { + rect.y = y; + dest = i810dev->destaddr + (y * i810dev->destpitch) + (rect.x * i810dev->pixeldepth); + PUT_LRING(BLIT | COLOR_BLT | 3); + PUT_LRING(COLOR_COPY_ROP << 16 | i810dev->destpitch | + SOLIDPATTERN | DYN_COLOR_EN | i810dev->blit_color); + PUT_LRING(1 << 16 | rect.w * i810dev->pixeldepth); + PUT_LRING(dest); + PUT_LRING(i810dev->color_value); + } + + INC_DDA(dda1); + INC_DDA(dda2); + + y++; + } + END_LRING(i810drv); + return true; +} + +static bool +i810FillTriangle( void *drv, void *dev, DFBTriangle *tri) +{ + I810DriverData *i810drv = (I810DriverData *) drv; + I810DeviceData *i810dev = (I810DeviceData *) dev; + bool err = true; + + dfb_sort_triangle(tri); + + if (tri->y3 - tri->y1 > 0) + err = i810fill_tri(tri, i810drv, i810dev); + + return err; +} + +static int +driver_probe( CoreGraphicsDevice *device ) +{ + switch (dfb_gfxcard_get_accelerator( device )) { + case FB_ACCEL_I810: /* Intel 810 */ + return 1; + } + return 0; +} + + +static void +driver_get_info( CoreGraphicsDevice *device, + GraphicsDriverInfo *info ) +{ + /* fill driver info structure */ + snprintf( info->name, + DFB_GRAPHICS_DRIVER_INFO_NAME_LENGTH, + "Intel 810/810E/810-DC100/815 Driver" ); + + snprintf( info->vendor, + DFB_GRAPHICS_DRIVER_INFO_VENDOR_LENGTH, + "Tony Daplas" ); + + snprintf( info->url, + DFB_GRAPHICS_DRIVER_INFO_URL_LENGTH, + "http://i810fb.sourceforge.net" ); + + snprintf( info->license, + DFB_GRAPHICS_DRIVER_INFO_LICENSE_LENGTH, + "LGPL" ); + + info->version.major = 0; + info->version.minor = 5; + + info->driver_data_size = sizeof (I810DriverData); + info->device_data_size = sizeof (I810DeviceData); +} + +static void +i810_release_resource( I810DriverData *idrv, I810DeviceData *idev ) +{ + agp_unbind unbind; + + if (idrv->flags & I810RES_STATE_SAVE) { + i810_writel( idrv->mmio_base, LP_RING, idev->lring1 ); + i810_writel( idrv->mmio_base, LP_RING + RING_HEAD, idev->lring2 ); + i810_writel( idrv->mmio_base, LP_RING + RING_START, idev->lring3 ); + i810_writel( idrv->mmio_base, LP_RING + RING_LEN, idev->lring4 ); + } + + if (idrv->flags & I810RES_MMAP) { + munmap((void *) idrv->aper_base, idev->info.aper_size * 1024 * 1024); + idrv->flags &= ~I810RES_MMAP; + } + + if (idrv->flags & I810RES_LRING_BIND) { + unbind.key = idev->lring_bind.key; + ioctl(idrv->agpgart, AGPIOC_UNBIND, &unbind); + } + + if (idrv->flags & I810RES_LRING_ACQ) + ioctl(idrv->agpgart, AGPIOC_DEALLOCATE, idev->lring_mem.key); + + if (idrv->flags & I810RES_OVL_BIND) { + unbind.key = idev->ovl_bind.key; + ioctl(idrv->agpgart, AGPIOC_UNBIND, &unbind); + } + + if (idrv->flags & I810RES_OVL_ACQ) + ioctl(idrv->agpgart, AGPIOC_DEALLOCATE, idev->ovl_mem.key); + + if (idrv->flags & I810RES_GART_ACQ) { + ioctl(idrv->agpgart, AGPIOC_RELEASE); + idrv->flags &= ~I810RES_GART_ACQ; + } + + if (idrv->flags & I810RES_GART) { + close(idrv->agpgart); + idrv->flags &= ~I810RES_GART; + } +} + +static DFBResult +i810_agp_setup( CoreGraphicsDevice *device, + I810DriverData *idrv, + I810DeviceData *idev ) +{ + idrv->agpgart = open("/dev/agpgart", O_RDWR); + if (idrv->agpgart == -1) + return DFB_IO; + D_FLAGS_SET( idrv->flags, I810RES_GART ); + + + if (ioctl(idrv->agpgart, AGPIOC_ACQUIRE)) { + D_PERROR( "I810/AGP: AGPIOC_ACQUIRE failed!\n" ); + return DFB_IO; + } + D_FLAGS_SET( idrv->flags, I810RES_GART_ACQ ); + + + if (!idev->initialized) { + agp_setup setup; + + setup.agp_mode = 0; + if (ioctl(idrv->agpgart, AGPIOC_SETUP, &setup)) { + D_PERROR( "I810/AGP: AGPIOC_SETUP failed!\n" ); + return DFB_IO; + } + + if (ioctl(idrv->agpgart, AGPIOC_INFO, &idev->info)) { + D_PERROR( "I810/AGP: AGPIOC_INFO failed!\n" ); + return DFB_IO; + } + } + + + idrv->aper_base = mmap( NULL, idev->info.aper_size * 1024 * 1024, PROT_WRITE, + MAP_SHARED, idrv->agpgart, 0 ); + if (idrv->aper_base == MAP_FAILED) { + D_PERROR( "I810/AGP: mmap() failed!\n" ); + i810_release_resource( idrv, idev ); + return DFB_IO; + } + D_FLAGS_SET( idrv->flags, I810RES_MMAP ); + + + if (!idev->initialized) { + u32 base; + + /* We'll attempt to bind at fb_base + fb_len + 1 MB, + to be safe */ + base = dfb_gfxcard_memory_physical(device, 0) - idev->info.aper_base; + base += dfb_gfxcard_memory_length(); + base += (1024 * 1024); + + idev->lring_mem.pg_count = RINGBUFFER_SIZE/4096; + idev->lring_mem.type = AGP_NORMAL_MEMORY; + if (ioctl(idrv->agpgart, AGPIOC_ALLOCATE, &idev->lring_mem)) { + D_PERROR( "I810/AGP: AGPIOC_ALLOCATE failed!\n" ); + i810_release_resource( idrv, idev ); + return DFB_IO; + } + D_FLAGS_SET( idrv->flags, I810RES_LRING_ACQ ); + + idev->lring_bind.key = idev->lring_mem.key; + idev->lring_bind.pg_start = base/4096; + if (ioctl(idrv->agpgart, AGPIOC_BIND, &idev->lring_bind)) { + D_PERROR( "I810/AGP: AGPIOC_BIND failed!\n" ); + i810_release_resource( idrv, idev ); + return DFB_IO; + } + D_FLAGS_SET( idrv->flags, I810RES_LRING_BIND ); + + idev->ovl_mem.pg_count = 1; + idev->ovl_mem.type = AGP_PHYSICAL_MEMORY; + if (ioctl(idrv->agpgart, AGPIOC_ALLOCATE, &idev->ovl_mem)) { + D_PERROR( "I810/AGP: AGPIOC_ALLOCATE failed!\n" ); + i810_release_resource( idrv, idev ); + return DFB_IO; + } + D_FLAGS_SET( idrv->flags, I810RES_OVL_ACQ ); + + idev->ovl_bind.key = idev->ovl_mem.key; + idev->ovl_bind.pg_start = (base + RINGBUFFER_SIZE)/4096; + if (ioctl(idrv->agpgart, AGPIOC_BIND, &idev->ovl_bind)) { + D_PERROR( "I810/AGP: AGPIOC_BIND failed!\n" ); + i810_release_resource( idrv, idev ); + return DFB_IO; + } + D_FLAGS_SET( idrv->flags, I810RES_OVL_BIND ); + } + + + if (idrv->flags & I810RES_GART_ACQ) { + ioctl(idrv->agpgart, AGPIOC_RELEASE); + idrv->flags &= ~I810RES_GART_ACQ; + } + + + idrv->lring_base = idrv->aper_base + idev->lring_bind.pg_start * 4096; + idrv->ovl_base = idrv->aper_base + idev->ovl_bind.pg_start * 4096; + idrv->pattern_base = idrv->ovl_base + 1024; + + if (!idev->initialized) { + memset((void *) idrv->ovl_base, 0xff, 1024); + memset((void *) idrv->pattern_base, 0xff, 4096 - 1024); + + idev->lring1 = 0;//i810_readl(idrv->mmio_base, LP_RING); + idev->lring2 = 0;//i810_readl(idrv->mmio_base, LP_RING + RING_HEAD); + idev->lring3 = 0;//i810_readl(idrv->mmio_base, LP_RING + RING_START); + idev->lring4 = 0;//i810_readl(idrv->mmio_base, LP_RING + RING_LEN); + + D_FLAGS_SET( idrv->flags, I810RES_STATE_SAVE ); + } + + idev->initialized = true; + + return DFB_OK; +} + +static DFBResult +driver_init_driver( CoreGraphicsDevice *device, + GraphicsDeviceFuncs *funcs, + void *driver_data, + void *device_data, + CoreDFB *core ) +{ + DFBResult ret; + I810DriverData *idrv = driver_data; + I810DeviceData *idev = device_data; + + idrv->idev = device_data; + + idrv->mmio_base = (volatile u8*) dfb_gfxcard_map_mmio( device, 0, -1 ); + if (!idrv->mmio_base) + return DFB_IO; + + ret = i810_agp_setup( device, idrv, idev ); + if (ret) { + dfb_gfxcard_unmap_mmio( device, idrv->mmio_base, -1 ); + return ret; + } + + idrv->info = idev->info; + + + funcs->CheckState = i810CheckState; + funcs->SetState = i810SetState; + funcs->EngineSync = i810EngineSync; + funcs->FlushTextureCache = i810FlushTextureCache; + + funcs->FillRectangle = i810FillRectangle; + funcs->DrawRectangle = i810DrawRectangle; + funcs->Blit = i810Blit; + funcs->FillTriangle = i810FillTriangle; + + dfb_layers_register( dfb_screens_at(DSCID_PRIMARY), driver_data, &i810OverlayFuncs ); + + return DFB_OK; +} + +static DFBResult +driver_init_device( CoreGraphicsDevice *device, + GraphicsDeviceInfo *device_info, + void *driver_data, + void *device_data ) +{ + I810DriverData *idrv = driver_data; + I810DeviceData *idev = device_data; + + /* fill device info */ + snprintf( device_info->name, + DFB_GRAPHICS_DEVICE_INFO_NAME_LENGTH, "810/810E/810-DC100/815" ); + + snprintf( device_info->vendor, + DFB_GRAPHICS_DEVICE_INFO_VENDOR_LENGTH, "Intel" ); + + device_info->caps.flags = CCF_CLIPPING; + device_info->caps.accel = I810_SUPPORTED_DRAWINGFUNCTIONS | + I810_SUPPORTED_BLITTINGFUNCTIONS; + device_info->caps.drawing = I810_SUPPORTED_DRAWINGFLAGS; + device_info->caps.blitting = I810_SUPPORTED_BLITTINGFLAGS; + + device_info->limits.surface_byteoffset_alignment = 32 * 4; + device_info->limits.surface_pixelpitch_alignment = 32; + + dfb_config->pollvsync_after = 1; + + i810_init_ringbuffer( idrv, idev ); + + return DFB_OK; +} + +static void +driver_close_device( CoreGraphicsDevice *device, + void *driver_data, + void *device_data ) +{ + I810DeviceData *i810dev = (I810DeviceData *) device_data; + I810DriverData *i810drv = (I810DriverData *) driver_data; + + i810ovlOnOff( i810drv, i810dev, false ); + + i810_wait_for_blit_idle( i810drv, i810dev ); + i810_lring_enable( i810drv, 0 ); + + i810_release_resource( i810drv, i810dev ); + + + D_DEBUG( "DirectFB/I810: DMA Buffer Performance Monitoring:\n"); + D_DEBUG( "DirectFB/I810: %9d DMA buffer size in KB\n", + RINGBUFFER_SIZE/1024 ); + D_DEBUG( "DirectFB/I810: %9d i810_wait_for_blit_idle calls\n", + i810dev->idle_calls ); + D_DEBUG( "DirectFB/I810: %9d i810_wait_for_space calls\n", + i810dev->waitfifo_calls ); + D_DEBUG( "DirectFB/I810: %9d BUFFER transfers (i810_wait_for_space sum)\n", + i810dev->waitfifo_sum ); + D_DEBUG( "DirectFB/I810: %9d BUFFER wait cycles (depends on GPU/CPU)\n", + i810dev->fifo_waitcycles ); + D_DEBUG( "DirectFB/I810: %9d IDLE wait cycles (depends on GPU/CPU)\n", + i810dev->idle_waitcycles ); + D_DEBUG( "DirectFB/I810: %9d BUFFER space cache hits(depends on BUFFER size)\n", + i810dev->fifo_cache_hits ); + D_DEBUG( "DirectFB/I810: %9d BUFFER timeout sum (possible hardware crash)\n", + i810dev->fifo_timeoutsum ); + D_DEBUG( "DirectFB/I810: %9d IDLE timeout sum (possible hardware crash)\n", + i810dev->idle_timeoutsum ); + D_DEBUG( "DirectFB/I810: Conclusion:\n" ); + D_DEBUG( "DirectFB/I810: Average buffer transfers per i810_wait_for_space " + "call: %.2f\n", + i810dev->waitfifo_sum/(float)(i810dev->waitfifo_calls) ); + D_DEBUG( "DirectFB/I810: Average wait cycles per i810_wait_for_space call:" + " %.2f\n", + i810dev->fifo_waitcycles/(float)(i810dev->waitfifo_calls) ); + D_DEBUG( "DirectFB/I810: Average wait cycles per i810_wait_for_blit_idle call:" + " %.2f\n", + i810dev->idle_waitcycles/(float)(i810dev->idle_calls) ); + D_DEBUG( "DirectFB/I810: Average buffer space cache hits: %02d%%\n", + (int)(100 * i810dev->fifo_cache_hits/ + (float)(i810dev->waitfifo_calls)) ); + +} + +static void +driver_close_driver( CoreGraphicsDevice *device, + void *driver_data ) +{ + I810DriverData *idrv = (I810DriverData *) driver_data; + + dfb_gfxcard_unmap_mmio( device, idrv->mmio_base, -1); + + if (idrv->flags & I810RES_MMAP) { + munmap((void *) idrv->aper_base, idrv->info.aper_size * 1024 * 1024); + idrv->flags &= ~I810RES_MMAP; + } + + if (idrv->flags & I810RES_GART_ACQ) { + ioctl(idrv->agpgart, AGPIOC_RELEASE); + idrv->flags &= ~I810RES_GART_ACQ; + } + + if (idrv->flags & I810RES_GART) { + close(idrv->agpgart); + idrv->flags &= ~I810RES_GART; + } +} + diff --git a/Source/DirectFB/gfxdrivers/i810/i810.h b/Source/DirectFB/gfxdrivers/i810/i810.h new file mode 100755 index 0000000..444c7c2 --- /dev/null +++ b/Source/DirectFB/gfxdrivers/i810/i810.h @@ -0,0 +1,832 @@ +/* + (c) Copyright 2001-2009 The world wide DirectFB Open Source Community (directfb.org) + (c) Copyright 2000-2004 Convergence (integrated media) GmbH + + All rights reserved. + + Written by Antonino Daplas <adaplas@pol.net> + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the + Free Software Foundation, Inc., 59 Temple Place - Suite 330, + Boston, MA 02111-1307, USA. +*/ + +/* + * Intel 810 Chipset Family PRM 15 3.1 + * GC Register Memory Address Map + * + * Based on: + * Intel (R) 810 Chipset Family + * Programmer s Reference Manual + * November 1999 + * Revision 1.0 + * Order Number: 298026-001 R + * + * All GC registers are memory-mapped. In addition, the VGA and extended VGA registers + * are I/O mapped. + */ + +#ifndef __I810_H__ +#define __I810_H__ + +#include <dfb_types.h> +#include <sys/io.h> +#include <linux/agpgart.h> + +#include <core/gfxcard.h> +#include <core/layers.h> + + +#define LP_RING 0x2030 +#define HP_RING 0x2040 + +#define RING_TAIL 0x00 +#define RING_HEAD 0x04 +#define RING_START 0x08 +#define RING_LEN 0x0C + + +/* Instruction and Interrupt Control Registers (01000h 02FFFh) */ +#define FENCE 0x02000 +#define PGTBL_CTL 0x02020 +#define PGTBL_ER 0x02024 +#define RINGBUFFER 0x02030 +#define LRING 0x02030 +#define IRING 0x02040 +#define HWS_PGA 0x02080 +#define IPEIR 0x02088 +#define IPEHR 0x0208C +#define INSTDONE 0x02090 +#define NOPID 0x02094 +#define HWSTAM 0x02098 +#define IER 0x020A0 +#define IIR 0x020A4 +#define IMR 0x020A8 +#define ISR 0x020AC +#define EIR 0x020B0 +#define EMR 0x020B4 +#define ESR 0x020B8 +#define INSTPM 0x020C0 +#define INSTPS 0x020C4 +#define BBP_PTR 0x020C8 +#define ABB_SRT 0x020CC +#define ABB_END 0x020D0 +#define DMA_FADD 0x020D4 +#define FW_BLC 0x020D8 +#define MEM_MODE 0x020DC + +/* Memory Control Registers (03000h 03FFFh) */ +#define DRT 0x03000 +#define DRAMCL 0x03001 +#define DRAMCH 0x03002 + + +/* Span Cursor Registers (04000h 04FFFh) */ +#define UI_SC_CTL 0x04008 + +/* I/O Control Registers (05000h 05FFFh) */ +#define HVSYNC 0x05000 +#define GPIOA 0x05010 +#define GPIOB 0x05014 + +/* Clock Control and Power Management Registers (06000h 06FFFh) */ +#define DCLK_0D 0x06000 +#define DCLK_1D 0x06004 +#define DCLK_2D 0x06008 +#define LCD_CLKD 0x0600C +#define DCLK_0DS 0x06010 +#define PWR_CLKC 0x06014 + +/* Graphics Translation Table Range Definition (10000h 1FFFFh) */ +#define GTT 0x10000 + +/* Overlay Registers (30000h 03FFFFh) */ +#define OV0ADDR 0x30000 +#define DOV0STA 0x30008 +#define GAMMA 0x30010 +#define OBUF_0Y 0x30100 +#define OBUF_1Y 0x30104 +#define OBUF_0U 0x30108 +#define OBUF_0V 0x3010C +#define OBUF_1U 0x30110 +#define OBUF_1V 0x30114 +#define OV0STRIDE 0x30118 +#define YRGB_VPH 0x3011C +#define UV_VPH 0x30120 +#define HORZ_PH 0x30124 +#define INIT_PH 0x30128 +#define DWINPOS 0x3012C +#define DWINSZ 0x30130 +#define SWID 0x30134 +#define SWIDQW 0x30138 +#define SHEIGHT 0x3013C +#define YRGBSCALE 0x30140 +#define UVSCALE 0x30144 +#define OV0CLRCO 0x30148 +#define OV0CLRC1 0x3014C +#define DCLRKV 0x30150 +#define DLCRKM 0x30154 +#define SCLRKVH 0x30158 +#define SCLRKVL 0x3015C +#define SCLRKM 0x30160 +#define OV0CONF 0x30164 +#define OV0CMD 0x30168 +#define AWINPOS 0x30170 +#define AWINZ 0x30174 + +/* BLT Engine Status (40000h 4FFFFh) (Software Debug) */ +#define BR00 0x40000 +#define BRO1 0x40004 +#define BR02 0x40008 +#define BR03 0x4000C +#define BR04 0x40010 +#define BR05 0x40014 +#define BR06 0x40018 +#define BR07 0x4001C +#define BR08 0x40020 +#define BR09 0x40024 +#define BR10 0x40028 +#define BR11 0x4002C +#define BR12 0x40030 +#define BR13 0x40034 +#define BR14 0x40038 +#define BR15 0x4003C +#define BR16 0x40040 +#define BR17 0x40044 +#define BR18 0x40048 +#define BR19 0x4004C +#define SSLADD 0x40074 +#define DSLH 0x40078 +#define DSLRADD 0x4007C + + +/* LCD/TV-Out and HW DVD Registers (60000h 6FFFFh) */ +/* LCD/TV-Out */ +#define HTOTAL 0x60000 +#define HBLANK 0x60004 +#define HSYNC 0x60008 +#define VTOTAL 0x6000C +#define VBLANK 0x60010 +#define VSYNC 0x60014 +#define LCDTV_C 0x60018 +#define OVRACT 0x6001C +#define BCLRPAT 0x60020 + +/* Display and Cursor Control Registers (70000h 7FFFFh) */ +#define DISP_SL 0x70000 +#define DISP_SLC 0x70004 +#define PIXCONF 0x70008 +#define PIXCONF1 0x70009 +#define BLTCNTL 0x7000C +#define SWF 0x70014 +#define DPLYBASE 0x70020 +#define DPLYSTAS 0x70024 +#define CURCNTR 0x70080 +#define CURBASE 0x70084 +#define CURPOS 0x70088 + + +/* VGA Registers */ + +/* SMRAM Registers */ +#define SMRAM 0x10 + +/* Graphics Control Registers */ +#define GR_INDEX 0x3CE +#define GR_DATA 0x3CF + +#define GR10 0x10 +#define GR11 0x11 + +/* CRT Controller Registers */ +#define CR_INDEX_MDA 0x3B4 +#define CR_INDEX_CGA 0x3D4 +#define CR_DATA_MDA 0x3B5 +#define CR_DATA_CGA 0x3D5 + +#define CR30 0x30 +#define CR31 0x31 +#define CR32 0x32 +#define CR33 0x33 +#define CR35 0x35 +#define CR39 0x39 +#define CR40 0x40 +#define CR41 0x41 +#define CR42 0x42 +#define CR70 0x70 +#define CR80 0x80 +#define CR81 0x82 + +/* Extended VGA Registers */ + +/* General Control and Status Registers */ +#define ST00 0x3C2 +#define ST01_MDA 0x3BA +#define ST01_CGA 0x3DA +#define FRC_READ 0x3CA +#define FRC_WRITE_MDA 0x3BA +#define FRC_WRITE_CGA 0x3DA +#define MSR_READ 0x3CC +#define MSR_WRITE 0x3C2 + +/* Sequencer Registers */ +#define SR_INDEX 0x3C4 +#define SR_DATA 0x3C5 + +#define SR01 0x01 +#define SR02 0x02 +#define SR03 0x03 +#define SR04 0x04 +#define SR07 0x07 + +/* Graphics Controller Registers */ +#define GR00 0x00 +#define GR01 0x01 +#define GR02 0x02 +#define GR03 0x03 +#define GR04 0x04 +#define GR05 0x05 +#define GR06 0x06 +#define GR07 0x07 +#define GR08 0x08 + +/* Attribute Controller Registers */ +#define ATTR_WRITE 0x3C0 +#define ATTR_READ 0x3C1 + +/* VGA Color Palette Registers */ + +/* CLUT */ +#define CLUT_DATA 0x3C9 /* DACDATA */ +#define CLUT_INDEX_READ 0x3C7 /* DACRX */ +#define CLUT_INDEX_WRITE 0x3C8 /* DACWX */ +#define DACMASK 0x3C6 + +/* CRT Controller Registers */ +#define CR00 0x00 +#define CR01 0x01 +#define CR02 0x02 +#define CR03 0x03 +#define CR04 0x04 +#define CR05 0x05 +#define CR06 0x06 +#define CR07 0x07 +#define CR08 0x08 +#define CR09 0x09 +#define CR0A 0x0A +#define CR0B 0x0B +#define CR0C 0x0C +#define CR0D 0x0D +#define CR0E 0x0E +#define CR0F 0x0F +#define CR10 0x10 +#define CR11 0x11 +#define CR12 0x12 +#define CR13 0x13 +#define CR14 0x14 +#define CR15 0x15 +#define CR16 0x16 +#define CR17 0x17 +#define CR18 0x18 + + +/* Raster ops */ +#define COLOR_COPY_ROP 0xF0 +#define PAT_COPY_ROP 0xCC +#define CLEAR_ROP 0x00 +#define WHITE_ROP 0xFF +#define INVERT_ROP 0x55 + +/* 2D Engine definitions */ +#define SOLIDPATTERN 0x80000000 +#define NONSOLID 0x00000000 +#define BPP8 0x00000000 +#define BPP16 0x01 << 24 +#define BPP24 0x02 << 24 +#define DYN_COLOR_EN 0x00400000 +#define DYN_COLOR_DIS 0x00000000 +#define INCREMENT 0x00000000 +#define DECREMENT 0x01 << 30 +#define ARB_ON 0x00000001 +#define ARB_OFF 0x00000000 +#define SYNC_FLIP 0x00000000 +#define ASYNC_FLIP 0x00000040 +#define OPTYPE_MASK 0xE0000000 +#define PARSER_MASK 0x001F8000 +#define D2_MASK 0x001FC000 /* 2D mask */ + +/* Instruction type */ +/* There are more but pertains to 3D */ +#define PARSER 0x00000000 +#define BLIT 0x02 << 29 +#define RENDER 0x03 << 29 + +/* Parser */ +#define NOP 0x00 /* No operation, padding */ +#define BP_INT 0x01 << 23 /* Breakpoint interrupt */ +#define USR_INT 0x02 << 23 /* User interrupt */ +#define WAIT_FOR_EVNT 0x03 << 23 /* Wait for event */ +#define FLUSH 0x04 << 23 +#define CONTEXT_SEL 0x05 << 23 +#define REPORT_HEAD 0x07 << 23 +#define ARB_ON_OFF 0x08 << 23 +#define OVERLAY_FLIP 0x11 << 23 +#define LOAD_SCAN_INC 0x12 << 23 +#define LOAD_SCAN_EX 0x13 << 23 +#define FRONT_BUFFER 0x14 << 23 +#define DEST_BUFFER 0x15 << 23 +#define Z_BUFFER 0x16 << 23 /* we won't need this */ +#define STORE_DWORD_IMM 0x20 << 23 +#define STORE_DWORD_IDX 0x21 << 23 +#define BATCH_BUFFER 0x30 << 23 + +/* Blit */ +#define SETUP_BLIT 0x00 +#define SETUP_MONO_PATTERN_SL_BLT 0x10 << 22 +#define PIXEL_BLT 0x20 << 22 +#define SCANLINE_BLT 0x21 << 22 +#define TEXT_BLT 0x22 << 22 +#define TEXT_IMM_BLT 0x30 << 22 +#define COLOR_BLT 0x40 << 22 +#define MONO_PAT_BLIT 0x42 << 22 +#define SOURCE_COPY_BLIT 0x43 << 22 +#define FULL_BLIT 0x45 << 22 + +/* Primitive */ +#define TRILIST 0 +#define TRISTRIP 1 << 18 +#define TRISTRIP_REV 2 << 18 +#define TRIFAN 3 << 18 +#define POLYGON 4 << 18 +#define LINELIST 5 << 18 +#define LINESTRIP 6 << 18 +#define RECTANGLE 7 << 18 +#define V0_ENABLE 1 +#define V1_ENABLE 2 +#define V2_ENABLE 4 + +/* Vertex Flags */ +#define COORD_1 0 +#define COORD_2 1 << 8 +#define COORD_3 2 << 8 +#define FOG_ENABLE 1 << 7 +#define ARGB_ENABLE 1 << 6 +#define Z_OFFSET_PRESENT 1 << 5 +#define XYZ 0x01 << 1 +#define XYZW 0x02 << 1 +#define XY 0x03 << 1 +#define XYW 0x04 << 1 + +/* Antialiasing */ +#define AA_UPDATE_EDGEFLAG (1<<13) +#define AA_ENABLE_EDGEFLAG (1<<12) +#define AA_UPDATE_POLYWIDTH (1<<11) +#define AA_POLYWIDTH_05 (1<<9) +#define AA_POLYWIDTH_10 (2<<9) +#define AA_POLYWIDTH_20 (3<<9) +#define AA_POLYWIDTH_40 (4<<9) +#define AA_UPDATE_LINEWIDTH (1<<8) +#define AA_LINEWIDTH_05 (1<<6) +#define AA_LINEWIDTH_10 (2<<6) +#define AA_LINEWIDTH_20 (3<<6) +#define AA_LINEWIDTH_40 (4<<6) +#define AA_UPDATE_BB_EXPANSION (1<<5) +#define AA_BB_EXPANSION_SHIFT 2 +#define AA_UPDATE_AA_ENABLE (1<<1) +#define AA_ENABLE (1<<0) + +/* Pixelization Rule */ +#define PVK_SMALL_TRI_UPDATE 1 << 12 +#define PVK_SMALL_TRI 1 << 11 +#define PVK_PIX_RULE_UPDATE 1 << 10 +#define PVK_PIX_RULE 1 << 9 +#define PVK_LINE_UPDATE 1 << 8 +#define PVK_LINE_V0 0 +#define PVK_LINE_V1 1 << 6 +#define PVK_TRIFAN_UPDATE 1 << 5 +#define PVK_TRIFAN_V0 0 +#define PVK_TRIFAN_V1 1 << 3 +#define PVK_TRIFAN_V2 2 << 3 +#define PVK_TRISTRIP_UPDATE 1 << 2 +#define PVK_TRISTRIP_V0 0 +#define PVK_TRISTRIP_V1 1 +#define PVK_TRISTRIP_V2 2 + +/* Boolean Enable 1 */ +#define B1_ALPHA_SETUP_ENABLE_UPDATE 1 << 17 +#define B1_ALPHA_SETUP_ENABLE 1 << 16 +#define B1_FOG_ENABLE_UPDATE 1 << 7 +#define B1_FOG_ENABLE 1 << 6 +#define B1_ALPHA_STATE_ENABLE_UPDATE 1 << 5 +#define B1_ALPHA_STATE_ENABLE 1 << 4 +#define B1_BLEND_ENABLE_UPDATE 1 << 3 +#define B1_BLEND_ENABLE 1 << 2 +#define B1_Z_ENABLE_UPDATE 1 << 1 +#define B1_Z_ENABLE 1 + +/* Boolean Enable 2 */ +#define B2_MCE_UPDATE 1 << 17 +#define B2_MCE 1 << 16 +#define B2_ALPHA_DITHER_UPDATE 1 << 15 +#define B2_ALPHA_DITHER 1 << 14 +#define B2_FOG_DITHER_UPDATE 1 << 13 +#define B2_FOG_DITHER 1 << 12 +#define B2_SPEC_DITHER_UPDATE 1 << 11 +#define B2_SPEC_DITHER 1 << 10 +#define B2_COLOR_DITHER_UPDATE 1 << 9 +#define B2_COLOR_DITHER 1 << 8 +#define B2_FB_WRITE_UPDATE 1 << 3 +#define B2_FB_WRITE 1 << 2 +#define B2_ZB_WRITE_UPDATE 1 << 1 +#define B2_ZB_WRITE 1 + +/* Cull Shade Mode */ +#define CULL_Z_UPDATE 1 << 20 +#define CULL_Z_ALWAYS 0 +#define CULL_Z_NEVER 1 << 16 +#define CULL_Z_LESS 2 << 16 +#define CULL_Z_EQUAL 3 << 16 +#define CULL_Z_LEQUAL 4 << 16 +#define CULL_Z_GREATER 5 << 16 +#define CULL_Z_NOTEQUAL 6 << 16 +#define CULL_Z_GEQUAL 7 << 16 +#define CULL_LINE_WIDTH_UPDATE 1 << 15 +#define CULL_LINE_WIDTH_MASK 7 << 12 +#define CULL_ALPHA_SHADE_UPDATE 1 << 11 +#define CULL_ALPHA_SHADE 1 << 10 +#define CULL_FOG_SHADE_UPDATE 1 << 9 +#define CULL_FOG_SHADE 1 << 8 +#define CULL_SPEC_SHADE_UPDATE 1 << 7 +#define CULL_SPEC_SHADE 1 << 6 +#define CULL_COLOR_SHADE_UPDATE 1 << 5 +#define CULL_COLOR_SHADE 1 << 4 +#define CULL_MODE_UPDATE 1 << 3 +#define CULL_NONE 1 << 2 +#define CULL_CW 2 << 2 +#define CULL_CCW 3 << 2 +#define CULL_BOTH 4 << 2 + +/* texel map */ +#define UPDATE_TEXEL1 1 << 15 +#define UPDATE_TEXEL0 1 << 7 +#define ENABLE_TEXEL1 1 << 14 +#define ENABLE_TEXEL0 1 << 6 +#define TEXEL1_COORD_IDX 1 << 11 +#define TEXEL0_COORD_IDX 1 << 3 +#define TEXEL1_MAP_IDX 1 << 8 +#define TEXEL0_MAP_IDX 1 + +/* color blend stage */ +#define COLOR_STAGE0 0 +#define COLOR_STAGE1 1 << 20 +#define COLOR_STAGE2 2 << 20 +#define UPDATE_COLOR_SELECT_MASK 1 << 19 +#define SELECT_COLOR_ACC 1 << 18 +#define SELECT_COLOR_CURRENT 0 +#define UPDATE_COLOR_ARG1 1 << 17 +#define ARG1_COLOR_FACTOR 1 << 14 +#define ARG1_COLOR_ACC 2 << 14 +#define ARG1_COLOR_ITERATED 3 << 14 +#define ARG1_COLOR_SPEC 4 << 14 +#define ARG1_COLOR_CURRENT 5 << 14 +#define ARG1_COLOR_TEXEL0 6 << 14 +#define ARG1_COLOR_TEXEL1 7 << 14 +#define ARG1_REPLICATE_ALPHA_TO_COLOR 1 << 13 +#define ARG1_COLOR_INVERT 1 << 12 +#define UPDATE_COLOR_ARG2 1 << 11 +#define ARG2_COLOR_FACTOR 1 << 8 +#define ARG2_COLOR_ACC 2 << 8 +#define ARG2_COLOR_ITERATED 3 << 8 +#define ARG2_COLOR_SPEC 4 << 8 +#define ARG2_COLOR_CURRENT 5 << 8 +#define ARG2_COLOR_TEXEL0 6 << 8 +#define ARG2_COLOR_TEXEL1 7 << 8 +#define ARG2_REPLICATE_ALPHA_TO_COLOR 1 << 7 +#define ARG2_COLORINVERT 1 << 6 +#define UPDATE_COLOR_OP 1 << 5 +#define DISABLE_COLOR_OP 0 +#define SELECT_COLOR_ARG1_OP 1 +#define SELECT_COLOR_ARG2_OP 2 +#define MODULATE_COLOR_OP 3 +#define MODULATE2X_COLOR_OP 4 +#define MODULATE4X_COLOR_OP 5 +#define ADD_COLOR_OP 6 +#define ADD_SIGNED_COLOR_OP 7 +#define LINEAR_ALPHA_ITER_OP 8 +#define LINEAR_ALPHA_FACTOR_OP 0x0a +#define LINEAR_TEXEL0_ALPHA_OP 0x10 +#define LINEAR_TEXEL1_ALPHA_OP 0x11 +#define LINEAR_TEXEL0_COLOR_OP 0x12 +#define LINEAR_TEXEL1_COLOR_OP 0x13 +#define SUBTRACT_COLOR_OP 0x14 + +/* alpha blend stage */ +#define ALPHA_STAGE0 0 +#define ALPHA_STAGE1 1 << 20 +#define ALPHA_STAGE2 2 << 20 +#define UPDATE_ALPHA_SELECT_MASK 1 << 19 +#define UPDATE_ALPHA_ARG1 1 << 18 +#define ARG1_ALPHA_FACTOR 1 << 15 +#define ARG1_ALPHA_ITERATED 3 << 15 +#define ARG1_ALPHA_CURRENT 5 << 15 +#define ARG1_ALPHA_TEXEL0 6 << 15 +#define ARG1_ALPHA_TEXEL1 7 << 15 +#define ARG1_ALPHA_INVERT 1 << 13 +#define UPDATE_ALPHA_ARG2 1 << 12 +#define ARG2_ALPHA_FACTOR 1 << 8 +#define ARG2_ALPHA_ITERATED 3 << 8 +#define ARG2_ALPHA_CURRENT 5 << 8 +#define ARG2_ALPHA_TEXEL0 6 << 8 +#define ARG2_ALPHA_TEXEL1 7 << 8 +#define ARG2_ALPHAINVERT 1 << 6 +#define UPDATE_ALPHA_OP 1 << 5 +#define DISABLE_ALPHA_OP 0 +#define SELECT_ALPHA_ARG1_OP 1 +#define SELECT_ALPHA_ARG2_OP 2 +#define MODULATE_ALPHA_OP 3 +#define MODULATE2X_ALPHA_OP 4 +#define MODULATE4X_ALPHA_OP 5 +#define ADD_ALPHA_OP 6 +#define ADD_SIGNED_ALPHA_OP 7 +#define LINEAR_ALPHA_ITER_OP 8 +#define LINEAR_ALPHA_FACTOR_OP 0x0a +#define LINEAR_TEXEL0_ALPHA_OP 0x10 +#define LINEAR_TEXEL1_ALPHA_OP 0x11 + +/* Source-Dest Blend Mono */ +#define UPDATE_MONO 1 << 13 +#define ENABLE_MONO 1 << 12 +#define DISABLE_MONO 0 +#define UPDATE_SRC_MONO_BLEND 1 << 11 +#define UPDATE_DEST_MONO_BLEND 1 << 5 + +#define SRC_ZERO 1 >>6 +#define SRC_ONE 2 << 6 +#define SRC_SRC_COLOR 3 << 6 +#define SRC_INV_SRC_COLOR 4 << 6 +#define SRC_SRC_ALPHA 5 << 6 +#define SRC_INV_SRC_ALPHA 6 << 6 +#define SRC_DST_COLOR 9 << 6 +#define SRC_INV_DST_COLOR 0x0a << 6 +#define SRC_BOTH_SRC_ALPHA 0x0c << 6 +#define SRC_BOTH_INV_SRC_ALPHA 0x0d << 6 + +#define DEST_ZERO 1 +#define DEST_ONE 2 +#define DEST_SRC_COLOR 3 +#define DEST_INV_SRC_COLOR 4 +#define DEST_SRC_ALPHA 5 +#define DEST_INV_SRC_ALPHA 6 +#define DEST_DST_COLOR 9 +#define DEST_INV_DST_COLOR 0x0a +#define DEST_BOTH_SRC_ALPHA 0x0c +#define DEST_BOTH_INV_SRC_ALPHA 0x0d + +/* Destination Render Buffer */ +#define RENDER_RGB8 0 +#define RENDER_RGB15 1 << 8 +#define RENDER_RGB16 2 << 8 +#define YUV_YSWAP 4 << 8 +#define YUV_NORMAL 5 << 8 +#define YUV_UVSWAP 6 << 8 +#define YUV_YUVSWAP 7 << 8 + +#define ORG_XBIASMASK 0x0F << 20 +#define ORG_YBIASMASK 0x0F << 16 +#define VSTRIDE 2 +#define VSTRIDE_OFFSET 1 + +/* Alpha Z-bias */ +#define UPDATE_ZBIAS 1 << 22 +#define UPDATE_ALPHA_FX 1 << 13 +#define UPDATE_ALPHA_REFERENCE 1 << 8 + +#define ALPHAFX_NEVER 1 << 9 +#define ALPHAFX_LESS 2 << 9 +#define ALPHAFX_EQUAL 3 << 9 +#define ALPHAFX_LEQUAL 4 << 9 +#define ALPHAFX_GREATER 5 << 9 +#define ALPHAFX_NOTEQUAL 6 << 9 +#define ALPHAFX_GEQUAL 7 << 9 +#define ALPHAFX_ALWAYS 8 << 9 + +/* Scissor */ +#define SCISSOR_ENABLE_UPDATE 1 << 1 +#define SCISSOR_ENABLE 1 + +/* Stipple */ +#define STIPPLE_ENABLE 1 << 16 + +/* Rendering Packets */ +/* state pipelined */ +#define COLOR_BLEND_STAGE RENDER | 0x00 << 24 +#define ALPHA_BLEND_STAGE RENDER | 0x01 << 24 +#define LINE_WIDTH_CULL_SHADE RENDER | 0x02 << 24 +#define BOOL_ENABLE_1 RENDER | 0x03 << 24 +#define BOOL_ENABLE_2 RENDER | 0x04 << 24 +#define VERTEX_FORMAT RENDER | 0x05 << 24 +#define ANTIALIAS RENDER | 0x06 << 24 +#define PVK_PIXEL_RULE RENDER | 0x07 << 24 +#define SRC_DEST_BLEND_MONO RENDER | 0x08 << 24 +#define MAP_TEXEL RENDER | 0x1C << 24 +#define PRIMITIVE RENDER | 0x1F << 24 + +/* multiple dwords */ +#define COLOR_FACTOR RENDER | 0x1D << 24 | 0x01 << 16 | 0 +#define COLOR_CHROMA_KEY RENDER | 0x1D << 24 | 0x02 << 16 | 1 +#define DRAWING_RECT_INFO RENDER | 0x1D << 24 | 0x80 << 16 | 3 +#define RENDER_BUF_DEST RENDER | 0x1D << 24 | 0x85 << 16 | 0 +#define SCISSOR_INFO RENDER | 0x1D << 24 | 0x81 << 16 | 1 +#define STIPPLE RENDER | 0x1D << 24 | 0x83 << 16 | 0 + +/* non-pipelined */ +#define ALPHA_Z_BIAS RENDER | 0x14 << 24 +#define FOG_COLOR RENDER | 0x15 << 24 +#define SCISSOR RENDER | 0x1C << 24 | 0x10 << 19 + + +#define RBUFFER_START_MASK 0xFFFFF000 +#define RBUFFER_SIZE_MASK 0x001FF000 +#define RBUFFER_HEAD_MASK 0x001FFFFC +#define RBUFFER_TAIL_MASK 0x001FFFF8 +#define RINGBUFFER_SIZE (128 * 1024) +#define RING_SIZE_MASK (RINGBUFFER_SIZE - 1) + +#define I810RES_GART 1 +#define I810RES_LRING_ACQ 2 +#define I810RES_LRING_BIND 4 +#define I810RES_OVL_ACQ 8 +#define I810RES_OVL_BIND 16 +#define I810RES_GART_ACQ 32 +#define I810RES_MMAP 64 +#define I810RES_STATE_SAVE 128 + +#ifndef AGP_NORMAL_MEMORY +#define AGP_NORMAL_MEMORY 0 +#endif + +#ifndef AGP_PHYSICAL_MEMORY +#define AGP_PHYSICAL_MEMORY 2 +#endif + +struct i810_ovl_regs { + u32 obuf_0y; + u32 obuf_1y; + u32 obuf_0u; + u32 obuf_0v; + u32 obuf_1u; + u32 obuf_1v; + u32 ov0stride; + u32 yrgb_vph; + u32 uv_vph; + u32 horz_ph; + u32 init_ph; + u32 dwinpos; + u32 dwinsz; + u32 swid; + u32 swidqw; + u32 sheight; + u32 yrgbscale; + u32 uvscale; + u32 ov0clrc0; + u32 ov0clrc1; + u32 dclrkv; + u32 dclrkm; + u32 sclrkvh; + u32 sclrkvl; + u32 sclrkm; + u32 ov0conf; + u32 ov0cmd; + u32 reserved; + u32 awinpos; + u32 awinsz; +}; + +typedef struct { + CoreLayerRegionConfig config; + int planar_bug; +} I810OverlayLayerData; + + +typedef struct { + unsigned int tail_mask; + + int size; + int head; + int tail; + int space; +} I810RingBuffer; + +typedef struct { + volatile void *virt; + unsigned int tail_mask; + unsigned int outring; +} I810RingBlock; + + +typedef struct { + bool initialized; + + I810RingBuffer lp_ring; + + bool overlayOn; + I810OverlayLayerData *iovl; + + agp_info info; + agp_allocate lring_mem; + agp_allocate ovl_mem; + agp_bind lring_bind; + agp_bind ovl_bind; + + u32 pattern; + u32 lring1; + u32 lring2; + u32 lring3; + u32 lring4; + + u32 i810fb_version; + u32 cur_tail; + int srcaddr, destaddr, srcpitch, destpitch; + int color_value, color_value3d, pixeldepth, blit_color; + int colorkey_bit, colorkey, render_color; + int clip_x1, clip_x2, clip_y1, clip_y2; + + /* state validation */ + int i_src; + int i_dst; + int i_color; + int i_colorkey; + int i_clip; + /* benchmarking */ + u32 waitfifo_sum; + u32 waitfifo_calls; + u32 idle_calls; + u32 fifo_waitcycles; + u32 idle_waitcycles; + u32 fifo_cache_hits; + u32 fifo_timeoutsum; + u32 idle_timeoutsum; +} I810DeviceData; + +typedef struct { + I810DeviceData *idev; + + volatile struct i810_ovl_regs *oregs; + + u32 flags; + int agpgart; + agp_info info; + volatile u8 *aper_base; + volatile u8 *lring_base; + volatile u8 *ovl_base; + volatile u8 *mmio_base; + volatile u8 *pattern_base; +} I810DriverData; + +extern DisplayLayerFuncs i810OverlayFuncs; + +void i810ovlOnOff( I810DriverData *idrv, + I810DeviceData *idev, + bool on ); + + +#define i810_readb(mmio_base, where) \ + *((volatile u8 *) (mmio_base + where)) \ + +#define i810_readw(mmio_base, where) \ + *((volatile u16 *) (mmio_base + where)) \ + +#define i810_readl(mmio_base, where) \ + *((volatile u32 *) (mmio_base + where)) \ + +#define i810_writeb(mmio_base, where, val) \ + *((volatile u8 *) (mmio_base + where)) = (volatile u8) val \ + +#define i810_writew(mmio_base, where, val) \ + *((volatile u16 *) (mmio_base + where)) = (volatile u16) val \ + +#define i810_writel(mmio_base, where, val) \ + *((volatile u32 *) (mmio_base + where)) = (volatile u32) val \ + +#define PUT_LRING(val) { \ + i810_writel(i810drv->lring_base, i810dev->cur_tail, val); \ + i810dev->cur_tail += 4; \ + i810dev->cur_tail &= RING_SIZE_MASK; \ +} + +#define BEGIN_LRING i810_wait_for_space + +#define END_LRING(i810drv) i810_writel(LRING, i810drv->mmio_base, i810dev->cur_tail) + +#endif /* __I810_H__ */ diff --git a/Source/DirectFB/gfxdrivers/i810/i810_overlay.c b/Source/DirectFB/gfxdrivers/i810/i810_overlay.c new file mode 100755 index 0000000..ccb0ffc --- /dev/null +++ b/Source/DirectFB/gfxdrivers/i810/i810_overlay.c @@ -0,0 +1,598 @@ +/* + i810_overlay.c -- Video Overlay Support (based partly from + XFree86 i810_video.c) + + (c) Copyright 2001-2009 The world wide DirectFB Open Source Community (directfb.org) + (c) Copyright 2000-2004 Convergence (integrated media) GmbH + + All rights reserved. + + Written by Antonino Daplas <adaplas@pol.net> + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the + Free Software Foundation, Inc., 59 Temple Place - Suite 330, + Boston, MA 02111-1307, USA. +*/ + +#include <config.h> + +#include <sys/ioctl.h> + +#include <string.h> + +#include <fbdev/fbdev.h> /* FIXME: Needs to be included before dfb_types.h to work around a type clash with asm/types.h */ + +#include <core/coredefs.h> +#include <core/layers.h> +#include <core/surface.h> +#include <core/screens.h> +#include <core/screen.h> + +#include <fbdev/fbdev.h> + +#include <direct/mem.h> + +#include <gfx/convert.h> + +#include "i810.h" + + +/* + * OV0CMD - Overlay Command Register + */ +#define VERTICAL_CHROMINANCE_FILTER 0x70000000 +#define VC_SCALING_OFF 0x00000000 +#define VC_LINE_REPLICATION 0x10000000 +#define VC_UP_INTERPOLATION 0x20000000 +#define VC_PIXEL_DROPPING 0x50000000 +#define VC_DOWN_INTERPOLATION 0x60000000 +#define VERTICAL_LUMINANCE_FILTER 0x0E000000 +#define VL_SCALING_OFF 0x00000000 +#define VL_LINE_REPLICATION 0x02000000 +#define VL_UP_INTERPOLATION 0x04000000 +#define VL_PIXEL_DROPPING 0x0A000000 +#define VL_DOWN_INTERPOLATION 0x0C000000 +#define HORIZONTAL_CHROMINANCE_FILTER 0x01C00000 +#define HC_SCALING_OFF 0x00000000 +#define HC_LINE_REPLICATION 0x00400000 +#define HC_UP_INTERPOLATION 0x00800000 +#define HC_PIXEL_DROPPING 0x01400000 +#define HC_DOWN_INTERPOLATION 0x01800000 +#define HORIZONTAL_LUMINANCE_FILTER 0x00380000 +#define HL_SCALING_OFF 0x00000000 +#define HL_LINE_REPLICATION 0x00080000 +#define HL_UP_INTERPOLATION 0x00100000 +#define HL_PIXEL_DROPPING 0x00280000 +#define HL_DOWN_INTERPOLATION 0x00300000 + +#define Y_ADJUST 0x00010000 +#define OV_BYTE_ORDER 0x0000C000 +#define UV_SWAP 0x00004000 +#define Y_SWAP 0x00008000 +#define Y_AND_UV_SWAP 0x0000C000 +#define SOURCE_FORMAT 0x00003C00 +#define RGB_555 0x00000800 +#define RGB_565 0x00000C00 +#define YUV_422 0x00002000 +#define YUV_411 0x00002400 +#define YUV_420 0x00003000 +#define YUV_410 0x00003800 +#define FIELD_MODE 0x00000020 +#define FRAME_MODE 0x00000000 +#define BUFFER_AND_FIELD 0x00000006 +#define BUFFER0_FIELD0 0x00000000 +#define BUFFER1_FIELD0 0x00000004 +#define OVERLAY_ENABLE 0x00000001 + +#define UV_VERT_BUF1 0x02 +#define UV_VERT_BUF0 0x04 + +#define SRC_CONSTANT_ALPHA_BLEND 1 << 31 +#define MINUV_SCALE 0x1 + +#define I810FB_IOC_UPDATEOVERLAY _IOW ('F', 0xF7, struct i810_ovl_regs) +#define I810FB_IOC_UPDATEOVERLAYCMD _IOW ('F', 0xF6, int) + +extern u32 i810_wait_for_space(I810DriverData *i810drv, + I810DeviceData *i810dev, + u32 space ); + +#define I810_OVERLAY_SUPPORTED_OPTIONS (DLOP_DST_COLORKEY | DLOP_DEINTERLACING) + +static void ovl_calc_regs (I810DriverData *i810drv, + I810OverlayLayerData *i810ovl, + CoreLayer *layer, + CoreSurface *surface, + CoreLayerRegionConfig *config, + CoreSurfaceBufferLock *lock ); + +static void update_overlay(I810DriverData *i810drv, + I810DeviceData *i810dev) +{ + i810_writel(i810drv->mmio_base, OV0ADDR, i810dev->ovl_mem.physical); +} + +void +i810ovlOnOff( I810DriverData *idrv, + I810DeviceData *idev, + bool on ) +{ + if (on) + idrv->oregs->ov0cmd |= 1; + else + idrv->oregs->ov0cmd &= ~1; + + update_overlay( idrv, idev ); +} + +static int +ovlLayerDataSize( void ) +{ + return sizeof(I810OverlayLayerData); +} + +static DFBResult +ovlInitLayer( + CoreLayer *layer, + void *driver_data, + void *layer_data, + DFBDisplayLayerDescription *description, + DFBDisplayLayerConfig *config, + DFBColorAdjustment *adjustment ) +{ + I810OverlayLayerData *i810ovl = (I810OverlayLayerData *) layer_data; + I810DriverData *idrv = driver_data; + I810DeviceData *idev = idrv->idev; + + idev->iovl = i810ovl; + + idrv->oregs = (volatile struct i810_ovl_regs*) idrv->ovl_base; + + memset( (void*) idrv->oregs, 0, sizeof(struct i810_ovl_regs) ); + + /* set_capabilities */ + description->caps = DLCAPS_SURFACE | DLCAPS_SCREEN_LOCATION | + DLCAPS_BRIGHTNESS | DLCAPS_CONTRAST | DLCAPS_SATURATION | + DLCAPS_DST_COLORKEY | DLCAPS_OPACITY | DLCAPS_DEINTERLACING; + + description->type = DLTF_GRAPHICS | DLTF_VIDEO | DLTF_STILL_PICTURE; + /* set name */ + snprintf( description->name, + DFB_DISPLAY_LAYER_DESC_NAME_LENGTH, "Intel 810/815 Overlay" ); + + /* fill out the default configuration */ + config->flags = DLCONF_WIDTH | DLCONF_HEIGHT | + DLCONF_PIXELFORMAT | DLCONF_BUFFERMODE | DLCONF_OPTIONS; + config->width = 640; + config->height = 480; + config->pixelformat = DSPF_YUY2; + config->buffermode = DLBM_FRONTONLY; + config->options = DLOP_NONE; + + /* fill out default color adjustment, + only fields set in flags will be accepted from applications */ + adjustment->flags = DCAF_BRIGHTNESS | DCAF_CONTRAST | DCAF_SATURATION; + adjustment->brightness = 0x8000; + adjustment->contrast = 0x8000; + adjustment->saturation = 0x8000; + + idrv->oregs->yrgb_vph = 0; + idrv->oregs->uv_vph = 0; + idrv->oregs->horz_ph = 0; + idrv->oregs->init_ph = 0; + idrv->oregs->dwinpos = 0; + idrv->oregs->dwinsz = (640 << 16) | 480; + idrv->oregs->swid = 640 | (640 << 15); + idrv->oregs->swidqw = (640 >> 3) | (640 << 12); + idrv->oregs->sheight = 480 | (480 << 15); + idrv->oregs->yrgbscale = 0x80004000; /* scale factor 1 */ + idrv->oregs->uvscale = 0x80004000; /* scale factor 1 */ + idrv->oregs->ov0clrc0 = 0x4000; /* brightness: 0 contrast: 1.0 */ + idrv->oregs->ov0clrc1 = 0x80; /* saturation: bypass */ + + idrv->oregs->sclrkvh = 0; + idrv->oregs->sclrkvl = 0; + idrv->oregs->sclrkm = 0; /* source color key disable */ + idrv->oregs->ov0conf = 0; /* two 720 pixel line buffers */ + + idrv->oregs->ov0cmd = VC_UP_INTERPOLATION | HC_UP_INTERPOLATION | Y_ADJUST | YUV_420; + + update_overlay( idrv, idev ); + + /* + * FIXME: If the fence registers are enabled, then the buffer pointers + * require specific alignment. This is a problem with planar formats + * which have separate pointers for each of the U and V planes. Packed + * formats should not be a problem. + */ + i810ovl->planar_bug = 0; + if (i810_readl(idrv->mmio_base, FENCE) & 1) + i810ovl->planar_bug = 1; + + return DFB_OK; +} + +static DFBResult +ovlTestRegion( CoreLayer *layer, + void *driver_data, + void *layer_data, + CoreLayerRegionConfig *config, + CoreLayerRegionConfigFlags *failed ) +{ + DFBDisplayLayerConfigFlags fail = 0; + I810OverlayLayerData *i810ovl = (I810OverlayLayerData *) layer_data; + + if (config->options & ~I810_OVERLAY_SUPPORTED_OPTIONS) + fail |= DLCONF_OPTIONS; + + switch (config->format) { + case DSPF_I420: + case DSPF_YV12: + case DSPF_YUY2: + case DSPF_UYVY: + break; + default: + fail |= DLCONF_PIXELFORMAT; + } + if (i810ovl->planar_bug && (config->format == DSPF_I420 || + config->format == DSPF_YV12 )) { + D_DEBUG("Sorry, planar formats will not work when memory tiling " + "is enabled\n"); + fail |= DLCONF_PIXELFORMAT; + } + + if (config->width > 1440 || config->width < 1) + fail |= DLCONF_WIDTH; + + if (config->height > 1023 || config->height < 1) + fail |= DLCONF_HEIGHT; + + if (failed) + *failed = fail; + + if (fail) + return DFB_UNSUPPORTED; + + return DFB_OK; +} + +static DFBResult +ovlSetRegion( CoreLayer *layer, + void *driver_data, + void *layer_data, + void *region_data, + CoreLayerRegionConfig *config, + CoreLayerRegionConfigFlags updated, + CoreSurface *surface, + CorePalette *palette, + CoreSurfaceBufferLock *lock) +{ + I810DriverData *i810drv = (I810DriverData *) driver_data; + I810OverlayLayerData *i810ovl = (I810OverlayLayerData *) layer_data; + + i810ovl->config = *config; + + ovl_calc_regs (i810drv, i810ovl, layer, surface, config, lock); + update_overlay(i810drv, i810drv->idev); + + i810ovlOnOff(i810drv, i810drv->idev, 1); + + return DFB_OK; +} + +static DFBResult +ovlRemoveRegion( CoreLayer *layer, + void *driver_data, + void *layer_data, + void *region_data ) +{ + I810DriverData *i810drv = (I810DriverData *) driver_data; + + /* disable overlay */ + i810ovlOnOff( i810drv, i810drv->idev, 0 ); + + return DFB_OK; +} + +static DFBResult +ovlFlipRegion( CoreLayer *layer, + void *driver_data, + void *layer_data, + void *region_data, + CoreSurface *surface, + DFBSurfaceFlipFlags flags, + CoreSurfaceBufferLock *lock ) +{ + I810DriverData *i810drv = (I810DriverData *) driver_data; + I810OverlayLayerData *i810ovl = (I810OverlayLayerData *) layer_data; + u32 current_buffer; + + dfb_surface_flip( surface, false ); + + /* select buffer */ + current_buffer = (i810drv->oregs->ov0cmd & 4) >> 2; + + if (current_buffer) { + i810drv->oregs->ov0cmd &= ~4; + } + else { + i810drv->oregs->ov0cmd |= 4; + } + + ovl_calc_regs (i810drv, i810ovl, layer, surface, &i810ovl->config, lock); + update_overlay(i810drv, i810drv->idev); + + if (flags & DSFLIP_WAIT) + dfb_screen_wait_vsync( dfb_screens_at( DSCID_PRIMARY ) ); + + return DFB_OK; +} + +static DFBResult +ovlSetColorAdjustment( CoreLayer *layer, + void *driver_data, + void *layer_data, + DFBColorAdjustment *adj ) +{ + I810DriverData *i810drv = (I810DriverData*) driver_data; + + i810drv->oregs->ov0clrc0 = (((adj->brightness >> 8) - 128) & 0xFF) | + ((adj->contrast >> 9) << 8); + i810drv->oregs->ov0clrc1 = (adj->saturation >> 8) & 0xFF; + + update_overlay(i810drv, i810drv->idev); + return DFB_OK; +} + +static DFBResult +ovlSetInputField( CoreLayer *layer, + void *driver_data, + void *layer_data, + void *region_data, + int field ) +{ + I810DriverData *i810drv = (I810DriverData*) driver_data; + + i810drv->oregs->ov0cmd &= ~2; + i810drv->oregs->ov0cmd |= (field) ? 2 : 0; + + update_overlay(i810drv, i810drv->idev); + return DFB_OK; +} + +DisplayLayerFuncs i810OverlayFuncs = { + .LayerDataSize = ovlLayerDataSize, + .InitLayer = ovlInitLayer, + .TestRegion = ovlTestRegion, + .SetRegion = ovlSetRegion, + .RemoveRegion = ovlRemoveRegion, + .FlipRegion = ovlFlipRegion, + .SetColorAdjustment = ovlSetColorAdjustment, + .SetInputField = ovlSetInputField, +}; + + +static void ovl_calc_regs (I810DriverData *i810drv, + I810OverlayLayerData *i810ovl, + CoreLayer *layer, + CoreSurface *surface, + CoreLayerRegionConfig *config, + CoreSurfaceBufferLock *lock ) +{ + u32 swidth = 0, y_offset, v_offset = 0, u_offset = 0; + u32 drw_w, src_w, drw_h, src_h, xscaleInt, xscaleFract, yscaleInt; + u32 xscaleFractUV = 0, xscaleIntUV, yscaleIntUV = 0, yscaleFract, yscaleFractUV = 0; + + DFBSurfacePixelFormat primary_format; + + drw_w = config->dest.w; + drw_h = config->dest.h; + src_w = surface->config.size.w; + src_h = surface->config.size.h; + + if (config->options & DLOP_DEINTERLACING) + src_h >>= 1; + + /* reset command register except the enable bit and buffer select bits */ + i810drv->oregs->ov0cmd &= 7; + + /* Set source dimension in bytes */ + switch (surface->config.format) { + case DSPF_I420: + case DSPF_YV12: + swidth = (src_w + 7) & ~7; + i810drv->oregs->swid = (swidth << 15) | swidth; + i810drv->oregs->swidqw = (swidth << 12) | (swidth >> 3); + break; + case DSPF_UYVY: + case DSPF_YUY2: + swidth = ((src_w + 3) & ~3) << 1; + i810drv->oregs->swid = swidth; + i810drv->oregs->swidqw = swidth >> 3; + break; + default: + break; + } + i810drv->oregs->sheight = src_h | (src_h << 15); + + /* select buffer size */ + if (swidth > 720) + i810drv->oregs->ov0conf = 1; + else + i810drv->oregs->ov0conf = 0; + + /* set dest window position and dimension */ + i810drv->oregs->dwinpos = (config->dest.y << 16) | config->dest.x; + i810drv->oregs->dwinsz = (drw_h << 16) | drw_w; + + /* Set buffer pointers */ + y_offset = (dfb_gfxcard_memory_physical(NULL, lock->offset)); + + switch (surface->config.format) { + case DSPF_I420: + u_offset = y_offset + surface->config.size.h * lock->pitch; + v_offset = u_offset + ((surface->config.size.h >> 1) * (lock->pitch >> 1)); + break; + case DSPF_YV12: + v_offset = y_offset + surface->config.size.h * lock->pitch; + u_offset = v_offset + ((surface->config.size.h >> 1) * (lock->pitch >> 1)); + break; + default: + break; + } + + if (i810drv->oregs->ov0cmd & 4) { + i810drv->oregs->obuf_1y = y_offset; + i810drv->oregs->obuf_1v = v_offset; + i810drv->oregs->obuf_1u = u_offset; + } + else { + i810drv->oregs->obuf_0y = y_offset; + i810drv->oregs->obuf_0v = v_offset; + i810drv->oregs->obuf_0u = u_offset; + } + + /* set scaling */ + i810drv->oregs->yrgbscale = 0x80004000; + i810drv->oregs->uvscale = 0x80004000; + + i810drv->oregs->ov0cmd |= VC_UP_INTERPOLATION | HC_UP_INTERPOLATION | Y_ADJUST | FRAME_MODE; + + if (config->options & DLOP_DEINTERLACING) + i810drv->oregs->ov0cmd |= FIELD_MODE; + + if ((drw_w != src_w) || (drw_h != src_h)) + { + xscaleInt = (src_w / drw_w) & 0x3; + xscaleFract = (src_w << 12) / drw_w; + yscaleInt = (src_h / drw_h) & 0x3; + yscaleFract = (src_h << 12) / drw_h; + + i810drv->oregs->yrgbscale = (xscaleInt << 15) | + ((xscaleFract & 0xFFF) << 3) | + (yscaleInt) | + ((yscaleFract & 0xFFF) << 20); + + if (drw_w > src_w) + { + i810drv->oregs->ov0cmd &= ~HORIZONTAL_CHROMINANCE_FILTER; + i810drv->oregs->ov0cmd &= ~HORIZONTAL_LUMINANCE_FILTER; + i810drv->oregs->ov0cmd |= (HC_UP_INTERPOLATION | HL_UP_INTERPOLATION); + } + + if (drw_h > src_h) + { + i810drv->oregs->ov0cmd &= ~VERTICAL_CHROMINANCE_FILTER; + i810drv->oregs->ov0cmd &= ~VERTICAL_LUMINANCE_FILTER; + i810drv->oregs->ov0cmd |= (VC_UP_INTERPOLATION | VL_UP_INTERPOLATION); + } + + if (drw_w < src_w) + { + i810drv->oregs->ov0cmd &= ~HORIZONTAL_CHROMINANCE_FILTER; + i810drv->oregs->ov0cmd &= ~HORIZONTAL_LUMINANCE_FILTER; + i810drv->oregs->ov0cmd |= (HC_DOWN_INTERPOLATION | HL_DOWN_INTERPOLATION); + } + + if (drw_h < src_h) + { + i810drv->oregs->ov0cmd &= ~VERTICAL_CHROMINANCE_FILTER; + i810drv->oregs->ov0cmd &= ~VERTICAL_LUMINANCE_FILTER; + i810drv->oregs->ov0cmd |= (VC_DOWN_INTERPOLATION | VL_DOWN_INTERPOLATION); + } + + if (xscaleFract) + { + xscaleFractUV = xscaleFract >> MINUV_SCALE; + i810drv->oregs->ov0cmd &= ~HC_DOWN_INTERPOLATION; + i810drv->oregs->ov0cmd |= HC_UP_INTERPOLATION; + } + + if (xscaleInt) + { + xscaleIntUV = xscaleInt >> MINUV_SCALE; + if (xscaleIntUV) + { + i810drv->oregs->ov0cmd &= ~HC_UP_INTERPOLATION; + } + } + + if (yscaleFract) + { + yscaleFractUV = yscaleFract >> MINUV_SCALE; + i810drv->oregs->ov0cmd &= ~VC_DOWN_INTERPOLATION; + i810drv->oregs->ov0cmd |= VC_UP_INTERPOLATION; + } + + if (yscaleInt) + { + yscaleIntUV = yscaleInt >> MINUV_SCALE; + if (yscaleIntUV) + { + i810drv->oregs->ov0cmd &= ~VC_UP_INTERPOLATION; + i810drv->oregs->ov0cmd |= VC_DOWN_INTERPOLATION; + } + } + + i810drv->oregs->uvscale = yscaleIntUV | ((xscaleFractUV & 0xFFF) << 3) | + ((yscaleFractUV & 0xFFF) << 20); + } + + switch(surface->config.format) { + case DSPF_YV12: + case DSPF_I420: + /* set UV vertical phase to -0.25 */ + i810drv->oregs->uv_vph = 0x30003000; + i810drv->oregs->init_ph = UV_VERT_BUF0 | UV_VERT_BUF1; + i810drv->oregs->ov0stride = (lock->pitch) | (lock->pitch << 15); + i810drv->oregs->ov0cmd &= ~SOURCE_FORMAT; + i810drv->oregs->ov0cmd |= YUV_420; + break; + case DSPF_UYVY: + case DSPF_YUY2: + i810drv->oregs->uv_vph = 0; + i810drv->oregs->init_ph = 0; + i810drv->oregs->ov0stride = lock->pitch; + i810drv->oregs->ov0cmd &= ~SOURCE_FORMAT; + i810drv->oregs->ov0cmd |= YUV_422; + i810drv->oregs->ov0cmd &= ~OV_BYTE_ORDER; + if (surface->config.format == DSPF_UYVY) + i810drv->oregs->ov0cmd |= Y_SWAP; + break; + default: + D_BUG("unexpected pixelformat"); + break; + } + + /* Set alpha window */ + i810drv->oregs->awinpos = i810drv->oregs->dwinpos; + i810drv->oregs->awinsz = i810drv->oregs->dwinsz; + + + /* + * Destination color keying. + */ + + primary_format = dfb_primary_layer_pixelformat(); + + i810drv->oregs->dclrkv = dfb_color_to_pixel( primary_format, + config->dst_key.r, + config->dst_key.g, + config->dst_key.b ); + + i810drv->oregs->dclrkm = (1 << DFB_COLOR_BITS_PER_PIXEL( primary_format )) - 1; + + if (config->options & DLOP_DST_COLORKEY) + i810drv->oregs->dclrkm |= 0x80000000; +} |